X9241A Datasheet, PDF (11/18 Pages) Xicor Inc. – Quad Digitally Controlled Potentiometer (XDCP)

X9241A
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter
l_CC Supply current (active)
I_SB V_CC current (standby)
I_LI
Input leakage current
I_LO Output leakage current
V_IH Input HIGH voltage
V_IL Input LOW voltage
V_OL Output LOW voltage
Min.
2
–1
Limits
Typ.
Max.
3
200
500
10
10
V_CC + 1
0.8
0.4
Unit
mA
µA
µA
µA
V
V
V
Test Condition
f_SCL = 100kHz, SDA = Open,
Other Inputs = V_SS
SCL = SDA = V_CC, Addr. = V_SS
V_IN = V_SS to V_CC
V_OUT = V_SS to V_CC
I_OL = 3mA
Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used
as a potentiometer.
(2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a poten-
tiometer. It is a measure of the error in step size.
(3) MI = RTOT/63 or (R_H–R_L)/63, single pot
(4) Max. = all four arrays cascaded together, Typical = individual array resolutions.
ENDURANCE AND DATA RETENTION
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Unit
Data changes per bit per register
Years
CAPACITANCE
Symbol
C_I/O⁽⁵⁾
C_IN⁽⁵⁾
Parameter
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3 and SCL)
Max.
19
12
Unit
pF
pF
Test Condition
V_I/O = 0V
V_IN = 0V
POWER-UP TIMING
Symbol
t_PUR⁽⁶⁾
t_PUW⁽⁶⁾
t_RV_CC
Parameter
Power-up to initiation of read operation
Power-up to initiation of write operation
V_CC Power up ramp rate
Min.
0.2
Typ.
Max.
1
5
50
Unit
ms
ms
V/msec
POWER-UP REQUIREMENTS (Power Up sequencing can affect correct recall of the wiper registers)
The preferred power-on sequence is as follows: First Vcc, then the potentiometer pins. It is suggested that Vcc
reach 90% of its final value before power is applied to the potentiometer pins. The Vcc ramp rate specification
should be met, and any glitches or slope changes in the Vcc line should be held to <100mV if possible. Also, Vcc
should not reverse polarity by more than 0.5V.
Notes: (5) This parameter is guaranteed by characterization or sample testing.
(6) t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated. These parameters
are guaranteed by design.
(7) This parameter is guaranteed by design.
(8) Maximum Wiper Current is derated over temperature. See the Wiper Current Derating Curve.
(9) Ti value denotes the maximum noise glitch pulse width that the device will ignore on either SCL or SDA pins. Any noise glitch pulse
width that is greater than this maximum value will be considered as a valid clock or data pulse and may cause communication failure
to the device.
REV 1.1.13 12/09/02
www.xicor.com
Characteristics subject to change without notice. 11 of 18