|
X25138 Datasheet, PDF (1/18 Pages) Xicor Inc. – 5MHz SPI Serial E2PROM with Block Lock PROTECTION | |||
|
128K
X25138
16K x 8 Bit
5MHz SPI Serial E2PROM with Block LockTM Protection
FEATURES
⢠5MHz Clock Rate
⢠Low Power CMOS
<1mA Standby Current
<5mA Active Current
⢠2.5V To 5.5V Power Supply
⢠SPI Modes (0,0 & 1,1)
⢠16K X 8 Bits
32 Byte Page Mode
⢠Block Lock⢠Protection
Protect 1/4, 1/2 or all of E2PROM Array
⢠Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
⢠Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
⢠Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
⢠High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
⢠Packages
8-Lead XBGA
8, 14-Lead SOIC
8-Lead PDIP
8-Lead TSSOP
FUNCTIONAL DIAGRAM
STATUS
REGISTER
WRITE
PROTECT
LOGIC
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
DESCRIPTION
The X25138 is a CMOS 128K-bit serial E2PROM,
internally organized as 16K x 8. The X25138 features
a Serial Peripheral Interface (SPI) and software
protocol allowing operation on a simple three-wire bus.
The bus signals are a clock input (SCK) plus separate
data in (SI) and data out (SO) lines. Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same
bus.
The X25138 also features two additional inputs that
provide the end user with added ï¬exibility. By
asserting the HOLD input, the X25138 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as
a hardwire input to the X25138 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25138 utilizes Xicorâs proprietary Direct WriteTM
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
X DECODE
LOGIC
128
16K BYTE
ARRAY
128 X 256
128
128 X 256
256
256 X 256
WRITE
CONTROL
AND
WP
TIMING
LOGIC
Direct Writeà and Block Lockà Protection is a trademark of Xicor, Inc.
ÃXicor, Inc. 1998 Patents Pending
1
7056â1.5 8/13/98 T2/C0/D1 EW
32
8
Y DECODE
DATA REGISTER
7037 FRM F01
Characteristics subject to change without notice
|
▷ |