WM2630 Datasheet, PDF (9/13 Pages) Wolfson Microelectronics plc – Octal 12-bit, Serial Input, Voltage Output DAC with Internal Reference

Production Data
WM2630
SERIAL INTERFACE
INTERFACE MODES
The control interface can operate in two different modes:
• In the microcontroller mode, FS needs to be held low until all 16 data bits have been transferred. If
FS is driven high before the 16^th falling clock edge, the data transfer is cancelled. The DAC is
updated after a rising edge on FS.
• In DSP mode, FS only needs to stay low for 20ns, and can go high before the 16^th falling clock edge.
SCLK
FS
DIN
X D15 D14
D1 D0 X E15 E14
E1 E0 X
Figure 7 Interface Timing in Microcontroller Mode
X F15 F14
SCLK
FS
DIN
X D15 D14
D1 D0 E15 E14
E1 E0 X
X X F15 F14
Figure 8 Interface Timing in DSP Mode
The operating mode is selected using pin 17 (MODE).
MODE PIN (17)
INTERFACE MODE
HIGH
Microcontroller
LOW or unconnected
DSP mode
Table 2 Interface Mode Selection
SERIAL CLOCK AND UPDATE RATE
Figure 1 shows the interface timing. The maximum serial clock rate is:
f _{SCLK max}
=
1
t_{WH min} + t_{WL min}
= 31MHz
Since a data word contains 16 bits, the sample rate is limited to
( ) ^{f s max}
=
16
1
t_{WH min} + t_{WL min}
= 1.95MHz
However, the DAC settling time to 12 bits accuracy limits the response time of the analogue output for
large input step transitions.
WOLFSON MICROELECTRONICS LTD
PD Rev 1.1 February 2001
9