WM8976_06 Datasheet, PDF (74/108 Pages) Wolfson Microelectronics plc – Stereo CODEC With Speaker Driver

WM8976
Pre-Production
The VMID_EN signal has an OR function performed with the normal VMID driver enable. If the
VMID_EN signal is to have no effect to normal functionality when jack detection is enabled, it should
set to 0 for all JD_EN0 or JD_EN1 settings.
If jack detection is not enabled (JD_EN=0), the output enables default to all 1’s, allowing the outputs
to be controlled as normal via the normal output enables found in Table 50.
REGISTER
ADDRESS
R9
GPIO control
BIT
LABEL
5:4 JD_SEL
DEFAULT
00
6
JD_EN
0
8:7 JD_VMID
00
R13
3:0 JD_EN0
0000
7:4 JD_EN1
0000
Table 62 Jack Detect Register Control Bits
DESCRIPTION
Pin selected as jack detection input
00 = GPIO1
01 = GPIO2
10 = GPIO3
11 = Reserved
Jack Detection Enable
0 = disabled
1 = enabled
[7] VMID_EN_0
[8] VMID_EN_1
Output enables when selected jack
detection input is logic 0.
[0]= OUT1_EN_0
[1]= OUT2_EN_0
[2]= OUT3_EN_0
[3]= OUT4_EN_0
Output enables when selected jack
detection input is logic 1
0000-0011 = Reserved
[4]= OUT1_EN_1
[5]= OUT2_EN_1
[6]= OUT3_EN_1
[7]= OUT4_EN_1
CONTROL INTERFACE
SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS
The control interface can operate as either a 3-wire or 2-wire MPU interface. The MODE pin
determines the 2 or 3 wire mode as shown in Table 63.
The WM8976 is controlled by writing to registers through a serial control interface. A control word
consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which control register is
accessed. The remaining 9 bits (B8 to B0) are register bits, corresponding to the 9 bits in each
control register.
MODE
INTERFACE FORMAT
Low
2 wire
High
3 wire
Table 63 Control Interface Mode Selection
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PP Rev 3.0 April 2006
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