WM8741_09 Datasheet, PDF (48/64 Pages) Wolfson Microelectronics plc – 24-bit 192kHz DAC with Advanced Digital Filtering

WM8741
REGISTER
ADDRESS
R8
Mode Control 2
08h
BITS
NAME
[1:0] DITHER[1:0]
[3:2] DIFF[1:0]
4
DOUT
5
SDOUT
6 DSD_GAIN
Table 61 R8 Mode Control Register 2
DEFAULT
10
00
0
0
0
DESCRIPTION
Production Data
ALU dither mode select:
00 = dither off
01 = RPDF dither applied in ALU
10 = TPDF dither applied in ALU
11 = HPDF dither applied in ALU
Note: DITHER[1:0] applies only to the dither mode in the ALU.
00 = Stereo
10 = Stereo reverse (left and right channels swapped)
01 = Mono left – differential outputs
VOUTLP is left channel.
VOUTLN is left channel inverted.
VOUTRP is left channel inverted.
VOUTRN is left channel.
11 = Mono right – differential outputs.
VOUTLP is right channel inverted.
VOUTLN is right channel.
VOUTRP is right channel.
VOUTRN is right channel inverted.
Daisychaining Mode. Audio data output control:
0 = No audio data daisychaining
1 = Audio data output on pin 23
Daisychaining Mode. Control data output control:
0 = No control data daisychaining
1 = Control data output on pin 25
DSD Plus gain control:
0 = Low gain, 1.4Vrms differential output level
1 = High gain, 2.0Vrms differential output level
REGISTER
ADDRESS
BITS
NAME
DEFAULT
R9
[7:0]
Software reset
09h
RESET
00000000
Table 62 R9 Software Reset Control Register
DESCRIPTION
Software reset. Writing to the register resets the entire chip, including
the register map.
REGISTER
ADDRESS
R32
Additional
Control 1
20h
BITS
NAME
0
DSD_NO_
NOTCH
1 DSD_LEVEL
Table 63 R32 Additional Control 1
DEFAULT
0
1
DESCRIPTION
DSD Direct 8fs Notch Filter
0: Enable 8fs notch filter
1: Disable 8fs notch filter
DSD Direct Filter Gain
0: High Gain
1: Low Gain
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PD, Rev 4.2, October 2009
48