WM8772 Datasheet, PDF (41/70 Pages) Wolfson Microelectronics plc – 24 BIT 192KHZ 6 CHANNEL CODEC WITH VOLUME CONTROL

Production Data
WM8722EFT - 32 PIN TQFP
MASTER CLOCK TIMING
ADCMCLK/
DACMCLK
t_MCLKL
t_MCLKH
t _MCLKY
WM8772EFT – 32 PIN TQFP
Figure 33 ADC and DAC Master Clock Timing Requirements
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25^oC, fs = 48kHz, DACMCLK and
ADCMCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
System Clock Timing Information
ADCMCLK and DACMCLK
System clock pulse width high
tMCLKH
ADCMCLK and DACMCLK
System clock pulse width low
tMCLKL
ADCMCLK and DACMCLK
System clock cycle time
tMCLKY
ADCMCLK and DACMCLK Duty
cycle
Table 13 Master Clock Timing Requirements
TEST CONDITIONS
MIN
11
11
28
40:60
TYP
MAX
UNIT
ns
ns
ns
60:40
DIGITAL AUDIO INTERFACE – MASTER MODE
ADCBCLK
ADCLRC
DACBCLK
WM8772
CODEC ^DACLRC
DOUT
DIN1/2/3
3
DSP/
ENCODER/
DECODER
Figure 34 Audio Interface - Master Mode
w
PD Rev 4.1 October 2004
41