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WM8971L Datasheet, PDF (33/56 Pages) Wolfson Microelectronics plc – STEREO CODEC FOR PORTABLE AUDIO APPLLICATIONS
Advanced Information
WM8971L
ENABLING THE OUTPUTS
Each analogue output of the WM8971L can be separately enabled or disabled. The analogue mixer
associated with each output is powered on or off along with the output pin. All outputs are disabled by
default. To save power, unused outputs should remain disabled.
Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop
noise (see “Power Management” and “Applications Information” sections)
REGISTER BIT
ADDRESS
LABEL
DEFAULT
R26 (1Ah)
6
LOUT1
0
Power
5
ROUT1
0
Management 4
LOUT2
0
(2)
3
ROUT2
0
2
MONO
0
Note: All “Enable” bits are 1 = ON, 0 = OFF
Table 23 Analogue Output Control
DESCRIPTION
LOUT1 Enable
ROUT1 Enable
LOUT2 Enable
ROUT2 Enable
MONOOUT Enable
Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor.
This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and
each output can be controlled using the VROI bit in register 27. The default is low (1.5kΩ), so that
any capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for
disabled outputs, VROI can then be set to 1, increasing the resistance to about 40kΩ.
REGISTER
ADDRESS
R27 (1Bh)
Additional (1)
BIT
LABEL
6
VROI
DEFAULT
0
Table 24 Disabled Outputs to VREF Resistance
DESCRIPTION
VREF to analogue output resistance
0: 1.5 kΩ
1: 40 kΩ
HEADPHONE SWITCH
The HPDETECT pin can be used as a headphone switch control input to automatically disable the
speaker output and enable the headphone output e.g. when a headphone is plugged into a jack
socket. In this mode, enabled by setting HPSWEN, HPDETECT switches between headphone and
speaker outputs (e.g. when the pin is connected to a mechanical switch in the headphone socket to
detect plug-in). The HPSWPOL bit reverses the pin’s polarity. Note that the LOUT1, ROUT1, LOUT2
and ROUT2 bits in register 26 must also be set for headphone and speaker output (see Table 25 and
Table 26).
HPSWEN
0
0
0
0
1
1
1
1
1
1
1
1
HPSWPOL HPDETECT L/ROUT1
(PIN23) (REG. 26)
X
X
0
X
X
0
X
X
1
X
X
1
0
0
X
0
0
X
0
1
0
0
1
1
1
0
0
1
0
1
1
1
X
1
1
X
L/ROUT2 HEADPHONE
(REG. 26) ENABLED
0
no
1
no
0
yes
1
yes
0
no
1
no
X
no
X
yes
X
no
X
yes
0
no
1
no
SPEAKER
ENABLED
no
yes
no
yes
no
yes
no
no
no
no
no
yes
Table 25 Headphone Switch Operation
w
AI Rev 3.0 March 2004
33