WM8770 Datasheet, PDF (31/52 Pages) Wolfson Microelectronics plc – 24-bit, 192kHz 8-Channel Codec with Volume Control

Production Data
WM8770
DAC ANALOGUE VOLUME CONTROL
The DAC volume may be adjusted independently in both the analogue and digital domain using
separate volume control registers.
REGISTER
ADDRESS
00000
Analogue
Attenuation
DACL1
00001
Analogue
Attenuation
DACR1
00010
Analogue
Attenuation
DACL2
00011
Analogue
Attenuation
DACR2
00100
Analogue
Attenuation
DACL3
00101
Analogue
Attenuation
DACR3
BIT LABEL
DEFAULT
DESCRIPTION
6:0 L1A[6:0]
1111111
(0dB)
Attenuation data for Left channel DACL1 in 1dB steps. See Table 11
7
L1ZCEN
0
DACL1 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store L1A in intermediate latch (no change to output)
1: Store L1A and update attenuation on all channels.
6:0 R1A[6:0]
1111111
(0dB)
Attenuation data for Right channel DACR1 in 1dB steps. See Table
11
7
R1ZCEN
0
DACR1 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store R1A in intermediate latch (no change to output)
1: Store R1A and update attenuation on all channels.
6:0 L2A[6:0]
1111111
(0dB)
Attenuation data for Left channel DACL2 in 1dB steps. See Table 11
7
L2ZCEN
0
DACL2 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store L2A in intermediate latch (no change to output)
1: Store L2A and update attenuation on all channels.
6:0 R2A[6:0]
1111111
(0dB)
Attenuation data for Right channel DACR2 in 1dB steps. See Table
11
7
R2ZCEN
0
DACR2 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store R2A in intermediate latch (no change to output)
1: Store R2A and update attenuation on all channels.
6:0 L3A[6:0]
1111111
(0dB)
Attenuation data for Left channel DACL3 in 1dB steps. See Table 11
7
L3ZCEN
0
DACL3 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store L3A in intermediate latch (no change to output)
1: Store L3A and update attenuation on all channels.
6:0 R3A[6:0]
1111111
(0dB)
Attenuation data for Right channel DACL3 in 1dB steps. See Table
11
7
R3ZCEN
0
DACR3 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store R3A in intermediate latch (no change to output)
1: Store R3A and update attenuation on all channels.
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PD Rev 4.1 June 2005
31