WM8980_07 Datasheet, PDF (29/112 Pages) Wolfson Microelectronics plc – Stereo CODEC With Speaker Driver and Video Buffer

Pre-Production
WM8980
REGISTER BIT
ADDRESS
LABEL
R45
5:0 INPPGAVOLL
Left channel
input PGA
volume
control
6
INPPGAMUTEL
7
INPPGAZCL
8
INPPGAUPDATE
R46
5:0 INPPGAVOLR
Right
channel
input PGA
volume
control
6
INPPGAMUTER
7
INPPGAZCR
8
INPPGAUPDATE
R32
8:7
ALC control
1
ALCSEL
Table 8 Input PGA Volume Control
DEFAULT
010000
0
0
Not
latched
010000
0
0
Not
latched
00
DESCRIPTION
Left channel input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
Mute control for left channel input PGA:
0=Input PGA not muted, normal
operation
1=Input PGA muted (and disconnected
from the following input BOOST stage).
Left channel input PGA zero cross
enable:
0=Update gain when gain register
changes
1=Update gain on 1^st zero cross after
gain register write.
INPPGAVOLL and INPPGAVOLR
volume do not update until a 1 is written
to INPPGAUPDATE (in reg 45 or 46)
Right channel input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = +35.25dB
Mute control for right channel input
PGA:
0=Input PGA not muted, normal
operation
1=Input PGA muted (and disconnected
from the following input BOOST stage).
Right channel input PGA zero cross
enable:
0=Update gain when gain register
changes
1=Update gain on 1^st zero cross after
gain register write.
INPPGAVOLL and INPPGAVOLR
volume do not update until a 1 is written
to INPPGAUPDATE (in reg 45 or 46)
ALC function select:
00=ALC off
01=ALC right only
10=ALC left only
11=ALC both on
w
PP Rev 3.1 March 2007
29