WM8739 Datasheet, PDF (25/35 Pages) Wolfson Microelectronics plc – STEREO AUDIO ADC

WM8739 / WM8739L
Advanced Information
After receiving a complete address and data sequence the WM8739 returns to the idle state and
waits for another start condition. Each write to a register requires the complete sequence of start
condition, device address and R/W bit followed by the 16 register address and data bits.
POWER DOWN MODES
The WM8739 contains power conservation modes in which various circuit blocks may be safely
powered down in order to conserve power. This is software programmable as shown in the table
below.
REGISTER
BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
0000110
0
Power Down
Control
LINEINPD
1
Line Input Power Down
1 = Enable Power Down
0 = Disable Power Down
2
ADCPD
1
ADC Power Down
1 = Enable Power Down
0 = Disable Power Down
5
OSCPD
0
Oscillator Power Down
1 = Enable Power Down
0 = Disable Power Down
7
POWEROFF 1
Power Off Device
1 = Device Power Off
0 = Device Power On
Table 16 Power Conservation Modes Software Control
Unused register bits 1,3,4,6 should be set to ‘1’ when writing to this register. The power down control
can be used to either a) permanently disable functions when not required in certain applications or b)
to dynamically power up and down functions depending on the operating mode, e.g.: during playback
or record. Please follow the special instructions below if dynamic implementations are being used.
OSCPD: Powers off the on board crystal oscillator. The MCLK input will function independently of the
Oscillator being powered down.
The device can be put into a standby mode (STANDBY) by powering down all the audio circuitry
under software control as shown in Table 17.
DESCRIPTION
0
0
1
1
0
1
1
1
Table 17 Standby Mode
STANDBY, but with Crystal
Oscillator
STANDBY, Crystal oscillator
not-available.
In STANDBY mode the Control Interface, a small portion of the digital and areas of the analogue
circuitry remain active. The active analogue includes the analogue VMID reference so that the
analogue line inputs remain biased to VMID. This reduces any audible effects caused by DC glitches
when entering or leaving STANDBY mode.
AI Rev 2.2 September 2001
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