WM8786_07 Datasheet, PDF (17/24 Pages) Wolfson Microelectronics plc – 24-Bit, 192kHz Stereo ADC

Production Data
WM8786
Figure 18a Master Mode
Figure 18b Slave Mode
AUDIO DATA FORMATS
In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 19 Left Justified Audio Interface (assuming n-bit word length)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before an LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 20 Right Justified Audio Interface (assuming n-bit word length)
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PD Rev 4.2 February 2007
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