WM9705 Datasheet, PDF (14/55 Pages) Wolfson Microelectronics plc – Multimedia AC97 CODEC with Integrated Touch Screen Controller

WM9705
WARM RESET
SYNC
t_{SYNC_HIGH}
t_SYNC2CLK
Production Data
BITCLK
Figure 6 Warm Reset Timing
PARAMETER
SYNC active high pulse width
SYNC inactive to BITCLK startup
delay
SYMBOL
tSYNC_HIGH
tSYNC2CLK
MIN
162.4
TYP
1.3
CLOCK SPECIFICATIONS
BITCLK
SYNC
t_{CLK_HIGH}
t_{CLK_PERIOD}
t_{SYNC_HIGH}
t_{CLK_LOW}
t_{SYNC_LOW}
t_{SYNC_PERIOD}
MAX
UNIT
µs
ns
Figure 7 Clock Specifications (50pF External Load)
PARAMETER
SYMBOL
BITCLK frequency
BITCLK period
tCLK_PERIOD
BITCLK output jitter
BITCLK high pulse width (Note 1)
tCLK_HIGH
BITCLK low pulse width (Note 1)
tCLK_LOW
SYNC frequency
SYNC period
tSYNC_PERIOD
SYNC high pulse width
tSYNC_HIGH
SYNC low pulse width
tSYNC_LOW
Note:
Worst case duty cycle restricted to 45/55.
MIN
36
36
TYP
12.288
81.4
40.7
40.7
48.0
20.8
1.3
19.5
MAX
750
45
45
UNIT
MHz
ns
ps
ns
ns
kHz
µs
µs
µs
w
PD Rev 4.0 December 2003
14