WM8591 Datasheet, PDF (14/50 Pages) Wolfson Microelectronics plc – 24 BIT, 192 KHZ STEREO CODEC

WM8591
Product Preview
Table 5 shows the typical system clock frequencies for ADC operation at both 128 times
oversampling rate (ADCOSR=0) and 64 times oversampling rate (ADCOSR=1), and DAC operation
at 128 times oversampling rate (DACOSR=0). Table 6 shows typical system clock frequencies for
DAC operation at 64 times oversampling rate (DACOSR =1).
SAMPLING
RATE
(ADCLRC/
DACLRC)
256fs
System Clock Frequency (MHz)
384fs
512fs
768fs
1152fs
(DAC only)
32kHz
8.192
12.288
16.384
24.576
36.864
44.1kHz
11.2896 16.9340
22.5792
33.8688 Unavailable
48kHz
12.288
18.432
24.576
36.864 Unavailable
96kHz
24.576
36.864 Unavailable Unavailable Unavailable
Table 5 ADC and DAC System Clock Frequencies Versus Sampling Rate
(ADC operation at either 128 times oversampling rate (ADCOSR=0) or 64 times oversampling
rate (ADCOSR=1), DAC operation at 128 times oversampling rate, DACOSR=0)
SAMPLING
RATE
(DACLRC)
System Clock Frequency (MHz)
128fs
192fs
96kHz
192kHz
12.288
24.576
18.432
36.864
Table 6 DAC System Clock Frequencies Versus Sampling Rate at 64 Times
Oversampling Rate (DACOSR=1)
In Master mode DACBCLK, ADCBCLK, DACLRC and ADCLRC are generated by the WM8591. The
frequencies of ADCLRC and DACLRC are set by setting the required ratio of DACMCLK to DACLRC
and ADCMCLK to ADCLRC using the DACRATE and ADCRATE control bits (Table 7).
ADCRATE[2:0]/
DACRATE[2:0]
000
001
010
011
100
101
ADCMCLK/DACMCLK:
ADCLRC/DACLRC
RATIO
128fs (DAC Only)
192fs (DAC Only)
256fs
384fs
512fs
768fs
Table 7 Master Mode MCLK: ADCLRC/DACLRC Ratio Select
Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and
ADCMCLK/DACMCLK frequencies.
SAMPLING
RATE
(DACLRC/
ADCLRC)
32kHz
44.1kHz
48kHz
96kHz
192kHz
128fs
DACRATE
=000
4.096
5.6448
6.144
12.288
24.576
System Clock Frequency (MHz)
192fs
256fs
384fs
512fs
768fs
DACRATE
=001
6.144
8.467
9.216
18.432
36.864
ADCRATE/
DACRATE
=010
ADCRATE/
DACRATE
=011
ADCRATE/
DACRATE
=100
ADCRATE/
DACRATE
=101
8.192
12.288
16.384
24.576
11.2896 16.9340 22.5792 33.8688
12.288
18.432
24.576
36.864
24.576
36.864 Unavailable Unavailable
Unavailable Unavailable Unavailable Unavailable
Table 8 Master Mode ADC/DACLRC Frequency Selection
w
PP Rev 1.0 May 2005
14