WM8782 Datasheet, PDF (11/19 Pages) Wolfson Microelectronics plc – 24-Bit, 192kHz Stereo ADC

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WM8782
DIGITAL AUDIO INTERFACE
The digital audio interface uses three pins:
• DOUT: ADC data output
• LRCLK: ADC data alignment clock
• BCLK: Bit clock, for synchronisation
The digital audio interface takes the data from the internal ADC digital filters and places it on DOUT
and LRCLK. DOUT is the formatted digital audio data stream output from the ADC digital filters with
left and right channels multiplexed together. LRCLK is an alignment clock that controls whether Left
or Right channel data is present on the DOUT line. DOUT and LRCLK are synchronous with the
BCLK signal with each data bit transition signified by a BCLK high to low transition. DOUT is always
an output. BCLK and LRCLK maybe an inputs or outputs depending whether the device is in Master
or Slave mode. (see Master and Slave Mode Operation, below).
Three different audio data formats are supported:
• Left justified
• Right justified
•
I²S
MASTER AND SLAVE MODE OPERATION
The WM8782 can be configured as either a master or slave mode device. As a master device the
WM8782 generates BCLK and LRCLK and thus controls sequencing of the data transfer on DOUT.
In slave mode, the WM8782 responds with data to clocks it receives over the digital audio interface.
The mode can be selected by setting the MS input pin (see Table 4 Master/Slave selection below).
Master and slave modes are illustrated below.
Figure 5 Master Mode
Figure 6 Slave Mode
PIN
M/S
DESCRIPTION
Master/Slave Selection
0 = Slave Mode
1= Master Mode
Table 4 Master/Slave selection
AUDIO INTERFACE CONTROL
The Input Word Length and Audio Format mode can be selected by using IWL and FORMAT pins.
PIN
DESCRIPTION
IWL
Word Length
0 = 16 bit
1 = 20 bit
Z = 24 bit
FORMAT
Audio Mode Select
0 = RJ
1 = LJ
Z = I2S
Table 5 Audio Data Format Control
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PP, May 2004, Rev 1.0
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