WM8945 Datasheet, PDF (106/169 Pages) Wolfson Microelectronics plc – Mono Low-Power CODEC with Video Buffer and Touch Panel Controller

WM8945
Production Data
RECOMMENDED POWER UP/DOWN SEQUENCE
In order to minimise output pop and click noise, it is recommended that the WM8945 device is
powered up and down using one of the following sequences:
Power Up:
ACTION
Turn on external supplies and wait for the
supply voltages to settle.
Reset registers to default state (software reset)
Enable speaker and line discharge bits
Enable VMID to speaker and line outputs
Enable VMID Fast Start and Start up Bias
Select Start-Up Bias and set VMID soft start for
start-up ramp
If using VMID as the reference voltage for the
LDO then select VMID fast start or set to 0 if
using the Bandgap as the reference voltage for
LDO.
Select LDO Start-Up Bias and enable LDO
Delay 300ms for LDO to settle
Enable VMID Buffer and Master Bias
Set VMID_SEL[1:0] for fast start-up
Disable speaker and line discharge bits
Enable speaker mixer and DAC
Enable speaker outputs and speaker PGA and
lineout output as required
Enable power to speaker drive
Enable VMID
Delay 150ms to allow VMID to settle
Set LDO for normal operation
Set VMID for normal operation
Set VMID divider for normal operation
LABEL
SW_RESET
SPKR_DISCH = 1
SPKL_DISCH = 1
LINEL_DISCH = 1
SPKR_VMID_OP_ENA = 1
SPKL_VMID_OP_ENA = 1
LINEL_VMID_OP_ENA = 1
VMID_FAST_START = 1
STARTUP_BIAS_ENA = 1
BIAS_SRC = 1
VMID_RAMP[1:0] = 01
LDO_REF_SEL_FAST = 1
LDO_BIAS_SRC = 1
LDO_ENA = 1
BIAS_ENA = 1
VMID_BUF_ENA = 1
VMID_SEL[1:0] = 11
SPKP_DISCH = 0
SPKN_DISCH = 0
LINEL_DISCH = 0
SPKR_MIX_ENA = 1
SPKL_MIX_ENA = 1
DACR_ENA = 1
DACL_ENA = 1
OUTR_ENA = 1
OUTL_ENA = 1
SPKR_PGA_ENA = 1
SPKL_PGA_ENA = 1
SPKN_OP_ENA = 1
SPKP_OP_ENA = 1
SPKR_SPKVDD_ENA = 1
SPKL_ SPKVDD _ENA = 1
VMID_ENA = 1
LDO_REF_SEL_FAST = 0
LDO_BIAS_SRC = 0
VMID_FAST_START = 0
STARTUP_BIAS_ENA = 0
VMID_SEL = 01
REGISTER [BITS]
R0 (00h) [15:0]
R42 (2Ah) [7]
R42 (2Ah) [6]
R42 (2Ah) [4]
R42 (2Ah) [13]
R42 (2Ah) [12]
R42 (2Ah) [10]
R7 (07h) [11]
R7 (07h) [8]
R7 (07h) [7]
R7 (07h) [6:5]
R53 (35h) [14]
R53 (35h) [5]
R53 (35h) [15]
R2 (02h) [3]
R2 (02h) [2]
R2 (02h) [1:0]
R42 (2Ah) [6]
R42 (2Ah) [7]
R42 (2Ah) [4]
R3 (03h) [3]
R3 (03h) [2]
R3 (03h) [1]
R3 (03h) [0]
R3 (03h) [15]
R3 (03h) [14]
R3 (03h) [13]
R3 (03h) [12]
R3 (03h) [7]
R3 (03h) [6]
R3 (03h) [11]
R3 (03h) [10]
R7 (07h) [4]
R53 (35h) [14]
R53 (35h) [5]
R7 (07h) [11]
R7 (07h) [8]
R2 (02h) [1:0]
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PD, May 2011, Rev 4.1
106