WM8993 Datasheet, PDF (102/229 Pages) Wolfson Microelectronics plc – Audio Hub CODEC for Multimedia Phones

WM8993
Production Data
REGISTER
ADDRESS
BIT
LABEL DEFAULT
9 IM_JD1_EIN
0
T
R23 (17h)
15 JD2_SC_PO
0
GPIO_POL
L
14 JD2_POL
0
10 JD1_SC_PO
0
L
9 JD1_POL
0
Table 66 MICBIAS Enable and Interrupt Control
DESCRIPTION
MICBIAS1 Current Detect interrupt mask
0 = do not mask interrupt
1 = mask interrupt
MICBIAS2 Short Circuit interrupt polarity
0 = active high
1 = active low
MICBIAS2 Current Detect interrupt polarity
0 = active high
1 = active low
MICBIAS1 Short Circuit interrupt polarity
0 = active high
1 = active low
MICBIAS1 Current Detect interrupt polarity
0 = active high
1 = active low
The MICBIAS current detect function is enabled by setting the JD_ENA register bit. When this
function is enabled, two current thresholds can be defined, using the JD_THR and JD_SC_THR
registers. When a change in MICBIAS current which crosses either threshold is detected, then an
interrupt event can be generated. In a typical application, accessory insertion would be detected
when the MICBIAS current exceeds JD_THR, and microphone hookswitch operation would be
detected when the MICBIAS current exceeds JD_SCTHR.
The current detect threshold functions are both inputs to the Interrupt control circuit and can be used
to trigger an Interrupt event when either threshold is crossed. Both events can also be indicated as
an output on a GPIO pin - see “GPIO1 Control”.
When GPIO1_SEL = 1000, 1001, 1010 or 1011, the selected Jack Detect status indication is output
on the GPIO1 pin. A logic 1 indicates that the associated Jack Detect is asserted. Note that the
polarity is not programmable for GPIO output; the GPIO1_POL field and the polarity select bits in
Table 66 affect the Interrupt behaviour only.
In a typical application, microphone insertion would be detected when the MICBIAS current exceeds
the Current Detect threshold set by JD_THR.
When the JDn_POL interrupt polarity bit is set to 0, then microphone insertion detection will cause
the JDn_EINT interrupt status register to be set. (‘n’ = 1 for MICBIAS1, 2 for MICBIAS2.)
For detection of microphone removal, the JDn_POL bit should be set to 1. When the JDn_POL
interrupt polarity bit is set to 1, then microphone removal detection will cause the JDn_EINT interrupt
status register to be set.
Microphone hook switch operation is detected when the MICBIAS current exceeds the Short Circuit
Detect threshold set by JD_SCTHR.
When the JDn_SC_POL interrupt polarity bit is set to 0, then hook switch operation will cause the
JDn_SC_EINT interrupt status register to be set.
For detection of microphone removal, the JDn_SC_POL bit should be set to 1. When the
JDn_SC_POL interrupt polarity bit is set to 1, then hook switch release will cause the JDn_SC_EINT
interrupt status register to be set.
CLOCK OUTPUT
A clock output (OPCLK) derived from CLK_SYS may be output on the GPIO1 pin. This clock is
enabled by register bit OPCLK_ENA, and its frequency is controlled by OPCLK_DIV.
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PD, November 2010, Rev 4.0
102