WM8196_07 Datasheet, PDF (1/32 Pages) Wolfson Microelectronics plc – (8 + 8) Bit Output 16-bit CIS/CCD AFE/Digitiser

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WM8196
(8 + 8) Bit Output 16-bit CIS/CCD AFE/Digitiser
DESCRIPTION
The WM8196 is a 16-bit analogue front end/digitiser IC
which processes and digitises the analogue output signals
from CCD sensors or Contact Image Sensors (CIS) at pixel
sample rates of up to 12MSPS.
The device includes three analogue signal processing
channels each of which contains Reset Level Clamping,
Correlated Double Sampling and Programmable Gain and
Offset adjust functions. Three multiplexers allow single
channel processing. The output from each of these
channels is time multiplexed into a single high-speed 16-bit
Analogue to Digital Converter. The digital output data is
available in 8 or 4-bit wide multiplexed format.
An internal 4-bit DAC is supplied for internal reference level
generation. This may be used during CDS to reference CIS
signals or during Reset Level Clamping to clamp CCD
signals. An external reference level may also be supplied.
ADC references are generated internally, ensuring optimum
performance from the device.
Using an analogue supply voltage of 5V and a digital
interface supply of either 5V or 3.3V, the WM8196 typically
only consumes 300mW when operating from a single
5V supply.
FEATURES
• 16-bit ADC
• 12MSPS conversion rate
• Low power – 320mW typical
• 5V single supply or 5V/3.3V dual supply operation
• Single or 3 channel operation
• Correlated double sampling
• Programmable gain (8-bit resolution)
• Programmable offset adjust (8-bit resolution)
• Programmable clamp voltage
• 8 or 4-bit wide multiplexed data output formats
• Internally generated voltage references
• 28-lead SSOP package
• Serial control interface
APPLICATIONS
• Flatbed and sheetfeed scanners
• USB compatible scanners
• Multi-function peripherals
• High-performance CCD sensor interface
BLOCK DIAGRAM
VRLC/VBIAS
VSMP MCLK
AVDD DVDD1 DVDD2
VRT VRX VRB
RINP
GINP
CL
RLC
RLC
R_S V_S
M
U
X
TIMING CONTROL
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WM8196
CDS
R_{M 8}
GU
X
B
OFFSET
DAC
VREF/BIAS
+ PGA
R_M
GU
X
B
I/P SIGNAL
8
POLARITY
ADJUST
CDS
+ PGA
8
OFFSET
DAC
8
I/P SIGNAL
POLARITY
ADJUST
+
M
+U
X
16-
BIT
ADC
DATA
I/O
PORT
OEB
OP[0]
OP[1]
OP[2]
OP[3]
OP[4]
OP[5]
OP[6]
OP[7]/SDO
BINP
RLC
RLC ₄
DAC
CDS
+ PGA
+
8
OFFSET
DAC
8
I/P SIGNAL
POLARITY
ADJUST
CONFIGURABLE
SERIAL
CONTROL
INTERFACE
SEN
SCK
SDI
RLC/ACYC
AGND1
AGND2
DGND
WOLFSON MICROELECTRONICS plc
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Production Data, March 2007, Rev 4.3
Copyright ©2007 Wolfson Microelectronics plc