WM8191 Datasheet, PDF (1/27 Pages) Wolfson Microelectronics plc – 14-bit 6MSPS CIS/CCD Analogue Front End/Digitiser

WM8191
14-bit 6MSPS CIS/CCD Analogue Front End/Digitiser
Advanced Information, April 2001, Rev 3.1
DESCRIPTION
The WM8191 is a 14-bit analogue front end/digitiser IC
which processes and digitises the analogue output signals
from CCD sensors or Contact Image Sensors (CIS) at pixel
sample rates of up to 6MSPS.
The device includes three analogue signal processing
channels each of which contains Reset Level Clamping,
Correlated Double Sampling and Programmable Gain and
Offset adjust functions. Three multiplexers allow single
channel processing. The output from each of these
channels is time multiplexed into a single high-speed 14-bit
analogue-to-digital converter. The digital output data is
available in 14-bit parallel or 8/7/4-bit wide multiplexed
format, with no missing codes.
An internal 4-bit DAC is supplied for internal reference level
generation. This may be used during CDS to reference CIS
signals or during Reset Level Clamping to clamp CCD
signals. Alternatively an external reference level may be
applied. ADC references are generated internally, ensuring
optimum performance from the device.
Using an analogue supply voltage of 5V and a digital
interface supply of either 5V or 3.3V, the WM8191 typically
only consumes 250mW when operating from a single 5V
supply and less than 1µA when in power down mode.
FEATURES
• 14-bit ADC
• No missing codes guaranteed
• 6MSPS conversion rate
• Low power – 250mW typical
• 5V single supply or 5V/3.3V dual supply operation
• Single or 3 channel operation
• Correlated double sampling
• Programmable gain (8-bit resolution)
• Programmable offset adjust (8-bit resolution)
• Programmable clamp voltage
• 14-bit parallel or 8/7/4-bit wide multiplexed data output
formats
• Internally generated voltage references
• 48-pin TQFP package
• Serial or parallel control interface
APPLICATIONS
• Flatbed and sheetfeed scanners
• USB compatible scanners
• Multi-function peripherals
• High-performance CCD sensor interface
BLOCK DIAGRAM
VRLC/VBIAS
(2)
VSMP MCLK
(15) (17)
AVDD1-2
(43, 44)
DVDD1-3
(10, 24, 35)
VRT VRX VRB
(48) (1) (47)
RINP (8)
GINP (6)
BINP (4)
CL
RLC
RLC
RLC
RLC ₄
DAC
R_S V_S
M
U
X
TIMING CONTROL
CDS
R_{M 8}
GU
X
B
OFFSET
DAC
+ PGA
R_M
8
GU
X
B
VREF/BIAS
I/P SIGNAL
POLARITY
ADJUST
CDS
+ PGA
8
OFFSET
DAC
8
I/P SIGNAL
POLARITY
ADJUST
CDS
+ PGA
8
OFFSET
DAC
8
I/P SIGNAL
POLARITY
ADJUST
WM8191
+
M
+U
X
14-
BIT
ADC
DATA
I/O
PORT
+
CONFIGURABLE
SERIAL/
PARALLEL
CONTROL
INTERFACE
(11) OEB
(21) OP[0]
(22) OP[1]
(23) OP[2]
(26) OP[3]
(27) OP[4]
(28) OP[5]
(29) OP[6]
(31) OP[7]
(32) OP[8]
(33) OP[9]
(34) OP[10]
(37) OP[11]
(38) OP[12]
(39) OP[13]/SDO
(12) SEN/STB
(14) SCK/RNW
(13) SDI/DNA
(16) RLC/ACYC
(42) NRESET
(3, 5, 7, 9, 45, 46)
AGND1-6
(18, 25, 30, 36, 40)
DGND1-5
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: [phone]
Fax: [phone]
Email: [e-mail]
www.wolfsonmicro.com
Advanced Information data sheets contain
preliminary data on new products in the
preproduction phase of development.
Supplementary data will be published at a
later date.
2001 Wolfson Microelectronics Ltd.