91SMOP Datasheet, PDF (1/1 Pages) Wolfgang Knap – Crystal Clock Oscillators

Crystal Clock Oscillators
91SMOP (+3.0V, +3.3V or +5V PROGRAMMABLE MODELS)
STANDARD SMD CLOCK OSCILLATORS
91SMOP
Actual Size
91SMOP
7.0±0.2
#4
#3
#1
#2
1.4 3.68 1.4
#1
#2
#4 5.08 #3
PIN
CONNECTION
1
"L"
OPEN or "H"
2
GND
3
Z
OUTPUT
4
VDD
Z : high impedance
OUTPUT WAVEFORM
TR
TF
VOH ("1"Level)
VDD
90% or 80% VDD
50% VDD
VOL ("0"Level)
GND
t
T
10% or 20% VDD
OV DC
Symmetry=t/TÊ·100(%)
TEST CIRCUIT
VDD _A
DC Power
Supply
V
Test Point
#4 #3
VDD OUTPUT
TRI-STATE
GND
CL
#1
#2
CL : including fixture and probe capacitance.
SOLDERING PATTERN
1.8
3.28
1.8
0.01ЖF
Ỗ
0.1ЖF
5.08
TAPE SPECIFICATIONS
4.0±0.1
L
2.0±0.1
П1.5
+0.1
-0
J
M
B
F
A B C D F J L M Reel Dia. Qty/Reel
7.4 5.4 16.0 7.5 8.0 1.5 0.3 1.9 180 1000pcs
STANDARD SPECIFICATIONS
using PLL technology
Item
Specifications
Generic part number
91SMOP^˞1
Frequency range
1.000 MHz to 200.000 MHz
1.000 MHz to 80.000 MHz
Frequency stability
91SMOP(A) : ʶ100 ppm
91SMOP(J) : ʶ100 ppm
(-20˚C to ʴ75˚C)
91SMOP(B) : ʶ50 ppm
91SMOP(K) : ʶ50 ppm
over all conditions
Operating Conditions
Operating temperature
-20˚C to ʴ75˚C
Input voltage (VDD)
ʴ3.0V ʶ10%, ʴ3.3V ʶ10% or ʴ5V ʶ10%
Tri-state control (Option1) Ê´3.0V & Ê´3.3V models
SMI P/N
Ê´3.0V & Ê´3.3V models
SMI P/N
OE control voltage
VIH : Ê´2.2 VDD min. 91SMOP(3VA)OE VIH : Ê´2.2 VDD min. 91SMOP(3VJ)OE
(Pin#1)/(Pin#3)
VIL : Ê´0.5 VDD max.
OPENË Output
VIHË Output
VILˠHigh Impedance^˞2
(˞2) Internal crystal oscillation to continue.
Ê´5V models
VIH : Ê´4.0 VDD min.
VIL : Ê´0.5 VDD max.
Tri-state control (Option2) Ê´3.0V & Ê´3.3V models
91SMOP(3VB)OE
SMI P/N
91SMOP(5VA)OE
91SMOP(5VB)OE
SMI P/N
VIL : Ê´0.5 VDD max.
Ê´5V models
VIH : Ê´4.0 VDD min.
VIL : Ê´0.5 VDD max.
Ê´3.0V & Ê´3.3V models
91SMOP(3VK)OE
SMI P/N
91SMOP(5VJ)OE
91SMOP(5VK)OE
SMI P/N
Stand-by (SB) control voltage VIH : Ê´2.2 VDD min. 91SMOP(3VA)SB VIH : Ê´2.2 VDD min. 91SMOP(3VJ)SB
(Pin#1)/(Pin#3)
OPENË Output
VIHË Output
VILˠHigh Impedance^˞3
(˞3) Internal crystal oscillation to stop.
Absolute Max. Ratings
VIL : Ê´0.5 VDD max.
Ê´5V models
VIH : Ê´4.0 VDD min.
VIL : Ê´0.5 VDD max.
91SMOP(3VB)SB
SMI P/N
91SMOP(5VA)SB
91SMOP(5VB)SB
VIL : Ê´0.5 VDD max.
Ê´5V models
VIH : Ê´4.0 VDD min.
VIL : Ê´0.5 VDD max.
91SMOP(3VK)SB
SMI P/N
91SMOP(5VJ)SB
91SMOP(5VK)SB
Supply voltage
-0.5V to Ê´7.0V DC
Storage temperature
-55˚C to ʴ125˚C
Input current ʴ3.0V ʶ10%
30 mA max.
20 mA max.
(Pin#1=Open or VIH) ʴ3.0V ʶ10%
30 mA max.
20 mA max.
ʴ5V ʶ10%
50 mA max.
30 mA max.
Stand-by current^˞3(option)
50ЖA max. (VDD = ʴ3.0V & Pin #1=VIL)
Output (-20˚C to ʴ75˚C)
Symmetry
45% to 55% at 50%VDD level (1.00MHz to 80.00MHz)
40% to 60% at 50%VDD level (80.00MHz to 200.00MHz)
Rise and fall times
5 ns max. (20%VDD to 80%VDD level)
"0" level
VOL : 10%VDD max. (1.00MHz to 130.00MHz)
VOL : 20%VDD max. (130.00MHz to 200.00MHz)
"1" level
VOH : 90%VDD min. (1.00MHz to 130.00MHz)
VOH : 80%VDD min. (130.00MHz to 200.00MHz)
Load
15 pF max. (CMOS)
50 pF max. (CMOS)
Disable delay time
100 ns max.
Enable delay time
150 ns max.(OE models)
10 ms max.(Stand-by models)
Startup time
10 ms max.
Jitter (pSp-p)
100, 200, 250 max. (depending on frequencies)
Aging (non operating)
ʶ5 ppm max. at ʴ25˚C ʶ3˚C for first year
Reflow condition
ʴ250˚C ʶ10˚C for 10 seconds
ʴ170˚C ʶ10˚C for 1 to 2 minutes (preheating)
PACKAGE DATA
Item
Package
Lid
Base
Sealing
Terminal
Terminal plating
RoHS
91SMOP
Ceramic
Ceramic
Glass
Tungsten (metalized)
Gold / Nickel
(surface) / (under)
Compliant
(˞1) Final exact part number to be determined with frequency,
frequency stability, operating temperature and input voltage.
e.g. 91SMOP(3.3VA)SB 200.000 MHz.
(˞2) Internal crystal oscillation to continue(Pin #1=VIL).
(˞3) Internal crystal oscillation to be halted(Pin #1=VIL).
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