W78L32_06 Datasheet, PDF (8/18 Pages) Winbond – 8-BIT MICROCONTROLLER

W78L32/W78L032A/W78M032A
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running. An internal trigger circuit in the reset line is used to
deglitch the reset line when the W78L32 is used with an external RC network. The reset logic also has
a special glitch removal circuit that ignores glitches on the reset line. During reset, the ports are
initialized to FFH, the stack pointer to 07H, PCON (with the exception of bit 4) to 00H, and all of the
other SFR registers except SBUF to 00H. SBUF is not reset.
7. ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
DC Power Supply
VCC−VSS
-0.3
+7.0
V
Input Voltage
VIN
VSS -0.3
VCC +0.3
V
Operating Temperature
TA
0
70
°C
Storage Temperature
TST
-55
+150
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
8. DC CHARACTERISTICS
(VDD−VSS = 5V ±10%, TA = 25°C, Fosc = 20 MHz, unless otherwise specified.)
PARAMETER
SYM.
PECIFICATION
MIN. MAX.
UNIT
Operating Voltage
Operating Current
Idle Current
VDD
1.8
5.5
V
IDD
-
20
mA
-
3
mA
IIDLE
-
6
mA
-
1.5
mA
Power Down Current
IPWDN
-
50
µA
Input Current
P1, P2, P3
Input Current
RST
-
20
µA
IIN1
-50
+10
µA
IIN2
-10 +300
µA
Input Leakage Current
P0, EA
Logic 1 to 0 Transition
Current
P1, P2, P3
ILK
-10
+10
µA
ITL [*4] -500
-
µA
TEST CONDITIONS
No load, VDD = 5.5V, 20 MHz
No load, VDD = 2.0V, 16 MHz
VDD = 5.5V, Fosc = 20 MHz
VDD = 2.0V, Fosc =16 MHz
VDD = 5.5V, Fosc = 20 MHz
VDD = 2.0V, Fosc = 16 MHz
VDD = 5.5V
VIN = 0V or VDD
VDD = 5.5V
0 < VIN < VDD
VDD = 5.5V
0V < VIN < VDD
VDD = 5.5V
VIN = 2.0V
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