W551C002 Datasheet, PDF (7/15 Pages) Winbond – Serial Voice Memory

Function Description
W551Cxxx Data Sheet
3.1 W551Cxxx Functional Description
The maximum number of the ADDR clock is 24 bits. The address data is shifted into the 24 bits address counter
by the ADDR clock. The MSB x bits of the address counter are the page codes, and the rest (24 - x) bits are the bit
of address. Note that the MSB is shifted first. The MSB 5 bits of the address counter are always gating (exclusive
OR) with the content of the page-code cells to determine whether these two articles are match or not. Only when the
page codes are matched with the content of the page-code cells, this device can be enabled. The counting source of
the address counter is the CLK clock, the falling edge signal of the CLK clock up-count the counter.
In normal-read mode the ADDR and CLK clock cannot be active simultaneously. The first rising edge signal of
the ADDR clock after CLK clocking will reset the address shift registers. The following table describes the needed
bits of ″page code″:
Part #
Density
Bits of
page code
W551C002
256K bits
6
W551C005
512K bits
5
W551C010
1M bits
4
W551C020
2M bits
3
W551C040
4M bits
2
W551C060
6M bits
2
W551C080
8M bits
1
Winbond Electronics Corp.
6
Release Date: January 2, 2001