W26010A Datasheet, PDF (7/10 Pages) Winbond – 64K 16 HIGH-SPEED CMOS STATIC RAM

W26010A
Timing Waveforms, continued
Write Cycle 1
(#OE Clock)
Address
#OE
#CS
#UB/#LB
#WE
D OUT
D IN
T WC
TWR
T_CW
T_BW
T_AW
T_WP
T_AS
T_DW
T_DH
Write Cycle 2
(#OE = VIL Fixed)
Address
#CS
#UB/#LB
#WE
DOUT
DIN
TWC
TCW
TBW
TWR
TAW
TWP
TAS
TOH
TWHZ (1, 4)
TOW
(2)
(3)
TDW
TDH
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
Publication Release Date: May 2001
-7-
Revision A5