W78LE812 Datasheet, PDF (4/25 Pages) Winbond – 8-BIT MTP MICROCONTROLLER

W78LE812
BLOCK DIAGRAM
P1.0
P1.7
P3.0
P3.7
P4.0
P4.6
Port
1
Port
3
Port
4
Port 1
Latch
INT2~9
Interrupt
Timer
2
Timer
0
Timer
1
UART
Port 3
Latch
Port 4
Latch
ACC
T1
B
T2
PSW
Stack
ALU
Pointer
Port 0
Latch
DPTR
Temp Reg.
PC
Incrementor
Addr. Reg.
Instruction
Decoder
&
Sequencer
SFR RAM
Address
256 bytes
RAM & SFR
Bus & Clock
Controller
Port 2
Latch
Oscillator
Watchdog
Timer
Reset Block
Power control
XTAL1 XTAL2
ALE
PSEN
RST
VCC
Vss
P0.0
Port
0
P0.7
P2.0
Port
2
P2.7
FUNCTIONAL DESCRIPTION
The W78LE812 architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, three timer/counters, and a serial port. The processor supports
111 different opcodes and references both a 64K program address space and a 64K data storage
space.
Timers 0, 1, and 2
Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0,
TL1 and TH1 for Timer 1, TL2 and TH2 for Timer 2. The TCON and TMOD registers provide control
functions for timers 0 and 1. The T2CON register provides control functions for Timer 2. RCAP2H
and RCAP2L are used as reload/capture registers for Timer 2. The operations of Timer 0 and Timer 1
are the same as in the W78C51. Timer 2 is a special feature of the W78LE812: it is a 16-bit up/down
counter that is configured and controlled by the T2CON and T2MOD registers. Like Timers 0 and 1,
Timer 2 can operate as either an external event counter or as an internal timer, depending on the
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