W83971D Datasheet, PDF (23/58 Pages) Winbond – AC97 AUDIO CODEC

Preliminary W83971D
6.16 3D Control Register (Index 22h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
Reg#
22h
DP3 DP2 DP1 DP0 0000h
This Register is used to control the depth of the 3D stereo enhancement function built into of the
AC′97 controller.
6.16.1 Depth of 3D Control Level
DP3 ... DP0
0
1
...
14
15
Depth
0%
6.67%
...
93.33%
100%
6.17 Power Down and Status Register (Index 26h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
Reg#
26h
PR5 PR4 PR3 PR2 PR1 PR0
REF ANL DAC ADC 0000h
6.17.1 PR[5:0] Power Down Mode Bits
These read/write bits are used to control the power down states of the W83971D. Each power down
function bit is enabled by setting the respective bit high. The power down modes controlled by each
bit is described in the table below:
6.17.2 Status (READ Only) bits
These bits are used to monitor the readiness of some sections of the W83971D. Reading a "1" from
any of these bits would be an indication of a "ready" state.
D<3:0>
REF
ANL
DAC
ADC
Status Read Only Bits
Vref at Nominal Levels
Mixers, Mux & Volume Controls Ready
DAC Ready to Accept Data
ADC Ready to Transmit Data
PR<5:0>
PR0
PR1
PR2
PR3
PR4
PR5
Power Down Mode Bits
ADC & Mux Power down
DAC Power down
Mixer (Vref on) Power down
Mixer (Vref off) Power down
AC-Link (BIT_CLK off) Power down
Internal Clock Disable
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Publication Release Date: July 1999
Revision A1