W39V040B_07 Datasheet, PDF (2/33 Pages) Winbond – 512K × 8 CMOS FLASH MEMORY WITH LPC INTERFACE

W39V040B
10.8 Write Cycle Timing Parameters................................................................................... 20
10.9 Data Polling and Toggle Bit Timing Parameters ......................................................... 20
11. TIMING WAVEFORMS FOR PROGRAMMER INTERFACE MODE ....................................... 21
11.1 Read Cycle Timing Diagram ....................................................................................... 21
11.2 Write Cycle Timing Diagram........................................................................................ 21
11.3 Program Cycle Timing Diagram .................................................................................. 22
11.4 #DATA Polling Timing Diagram................................................................................... 22
11.5 Toggle Bit Timing Diagram.......................................................................................... 23
11.6 Sector Erase Timing Diagram ..................................................................................... 23
12. LPC INTERFACE MODE AC CHARACTERISTICS................................................................. 24
12.1 AC Test Conditions ..................................................................................................... 24
12.2 Read/Write Cycle Timing Parameters ......................................................................... 24
12.3 Reset Timing Parameters............................................................................................ 24
13. TIMING WAVEFORMS FOR LPC INTERFACE MODE........................................................... 25
13.1 Read Cycle Timing Diagram ....................................................................................... 25
13.2 Write Cycle Timing Diagram........................................................................................ 25
13.3 Program Cycle Timing Diagram .................................................................................. 26
13.4 #DATA Polling Timing Diagram................................................................................... 27
13.5 Toggle Bit Timing Diagram.......................................................................................... 28
13.6 Sector Erase Timing Diagram ..................................................................................... 29
13.7 FGPI Register/Product ID Readout Timing Diagram .................................................. 30
13.8 Reset Timing Diagram................................................................................................. 30
14. ORDERING INFORMATION..................................................................................................... 31
15. HOW TO READ THE TOP MARKING...................................................................................... 31
16. PACKAGE DIMENSIONS ......................................................................................................... 32
16.1 32L PLCC .................................................................................................................... 32
16.2 32L STSOP ................................................................................................................. 32
17. VERSION HISTORY ................................................................................................................. 33
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