W79E532A Datasheet, PDF (17/78 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E532A/W79L532A
Port 4
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
P4.3 P4.2 P4.1 P4.0
Mnemonic: P4
Address: A5h
P4.3-0: Port 4 is a bi-directional I/O port with internal pull-ups. Port 4 can not use bit-addressable
instruction (SETB or CLR).
Interrupt Enable
Bit:
7
6
5
4
EA
ES1 ET2
ES
3
2
1
0
ET1 EX1 ET0 EX0
EA:
ET2:
ES:
ET1:
EX1:
ET0:
EX0:
Mnemonic: IE
Global enable. Enable/disable all interrupts.
Enable Timer 2 interrupt.
Enable Serial Port 0 interrupt.
Enable Timer 1 interrupt
Enable external interrupt 1
Enable Timer 0 interrupt
Enable external interrupt 0
Address: A8h
Slave Address
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR
Address: A9h
SADDR: The SADDR should be programmed to the given or broadcast address for serial port 0 to
which the slave processor is designated.
ROM Banking Control
Bit:
7
6
5
4
3
2
1
0
-
-
-
- EN128K DCP12 DCP11 DCP10
Mnemonic: ROMCON
Address: ABh
EN128K: On-chip ROM banking enable. Set this bit to enable APFlash0 and APFlash1 by banking
mechanism. The P1.x is selected to be the auxiliary highest address line A16.
DCP1x: A16 selection. By default, P1.7 is defined as A16.
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Publication Release Date: January 03, 2007
Revision A7