English
Language : 

W9812G6IH_10 Datasheet, PDF (15/42 Pages) Winbond – 2M × 4 BANKS × 16 BITS SDRAM
W9812G6IH
9.5 AC Characteristics and Operating Condition
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -5/-6/-6C/-75, TA= -40 to 85°C for -6I/-6A) (Notes: 5, 6)
PARAMETER
SYM.
Ref/Active to Ref/Active Command
Period
tRC
Active to precharge Command Period tRAS
Active to Read/Write Command Delay
Time
tRCD
Read/Write(a) to Read/Write(b)
Command Period
tCCD
Precharge to Active Command Period tRP
Active(a) to Active(b) Command
Period
tRRD
Write Recovery Time
CL* = 2
tWR
CL* = 3
CLK Cycle Time
CL* = 2
tCK
CL* = 3
CLK High Level width
tCH
CLK Low Level width
tCL
CL* = 2
Access Time from CLK
tAC
CL* = 3
CL* = 2
Output Data Hold Time
tOH
CL* = 3
Output Data High
Impedance Time
CL* = 2
tHZ
CL* = 3
Output Data Low Impedance Time
tLZ
Power Down Mode Entry Time
tSB
Transition Time of CLK (Rise and Fall) tT
Data-in Set-up Time
tDS
Data-in Hold Time
tDH
Address Set-up Time
tAS
Address Hold Time
tAH
CKE Set-up Time
tCKS
CKE Hold Time
tCKH
Command Set-up Time
tCMS
Command Hold Time
tCMH
Refresh Time
tREF
Mode register Set Cycle Time
tRSC
Exit self refresh to ACTIVE command tXSR
-5
-6
-6C/-6I/-6A
-75
UNIT NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
55
60
60
65
40 100000 42 100000 42 100000 45 100000 nS
15
15
18
20
1
1
1
1
tCK
15
15
18
20
10
12
12
15
nS
2
2
2
2
tCK
2
2
2
2
10 1000 10 1000 10 1000 10 1000
5 1000 6 1000 6 1000 7.5 1000
2
2
2
2.5
8
2
2
2
2.5
8
6
6
4.5
5
6
6
9
5
5.4
3
3
3
3
9
2
2
3
2
6
6
4.5
5
6
6
7
5
5.4
0
0
0
0
9
0
5
0
6
0
6
0
7.5 nS
1
1
1
1
1.5
1.5
1.5
1.5
8
1.0
1.0
0.8
1.0
8
1.5
1.5
1.5
1.5
8
1.0
1.0
0.8
1.0
8
1.5
1.5
1.5
1.5
8
1.0
1.0
0.8
1.0
8
1.5
1.5
1.5
1.5
8
1.0
1.0
0.8
1.0
8
64
64
64
64 mS
10
12
12
15
nS
70
72
72
75
nS
*CL = CAS Latency
- 15 -
Publication Release Date: Mar. 22, 2010
Revision A10