W78C32C_06 Datasheet, PDF (10/18 Pages) Winbond – 8-BIT MICROCONTROLLER

W78C32C/W78C032C
6.3.2 Program Fetch Cycle
PARAMETER
Address Valid to ALE Low
Address Hold after ALE Low
SYMBOL
TAAS
TAAH
MIN.
1 TCP-Δ
1 TCP-Δ
TYP.
-
-
ALE Low to PSEN Low
TAPL
1 TCP-Δ
-
PSEN Low to Data Valid
TPDA
-
-
Data Hold after PSEN High
TPDH
0
-
Data Float after PSEN High
ALE Pulse Width
TPDZ
TALW
0
2 TCP-Δ
-
2 TCP
PSEN Pulse Width
TPSW
3 TCP-Δ 3 TCP
Notes:
1. P0.0−P0.7, P2.0−P2.7 remain stable throughout entire memory cycle.
2. Memory access time is 3 TCP.
3. Data have been latched internally prior to PSEN going high.
4. "Δ" ( due to buffer driving delay and wire loading) is 20 nS.
MAX.
-
-
-
2 TCP
1 TCP
1 TCP
-
-
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
6.3.3 Data Read Cycle
PARAMETER
ALE Low to RD Low
SYMBOL
TDAR
MIN.
3 TCP-Δ
RD Low to Data Valid
TDDA
-
Data Hold after RD High
TDDH
0
Data Float after RD High
TDDZ
0
RD Pulse Width
TDRD
6 TCP-Δ
Notes:
1. Data memory access time is 8 TCP.
2. "Δ" (due to buffer driving delay and wire loading) is 20 nS.
TYP.
-
-
-
-
6 TCP
MAX.
3 TCP+Δ
4 TCP
2 TCP
2 TCP
-
UNIT
nS
nS
nS
nS
nS
NOTES
4
1, 4
4
2
3
4
4
NOTES
1, 2
1
2
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