W682388_1 Datasheet, PDF (1/2 Pages) Winbond – Dual Programmable Extended CODEC/SLIC

Winbond W682388
Dual Programmable Extended CODEC/SLIC
The W682388 implements a dual channel FXS telephone
line interface optimized for short loop applications. It
integrates dual SLIC (Subscriber Line Interface Circuit)
functionality with a dual channel programmable CODEC and a
dual DC-DC controller. The SLIC supports internal ringing up
to 90VPK (5REN at 4kft), ideal for customer premise equipment
(CPE). The CODEC can be configured for μ-law/ A-law or
16-bit linear PCM encoding and supports a comprehensive set
of signaling capabilities required to supervise and control both
telephone lines. These include tone generation (including ring
tones), DTMF generation and detection as well as FSK and
metering pulse generation. An on-chip dual pulse width
modulation (PWM) driver allows the control of DC-DC
conversion for each line. Programmable impedance and
transhybrid balancing allow for worldwide deployment.
APPLICATIONS
Analog Telephone Adapter
Voice enabled DSL Modems
Voice enabled Cable Modems
Residential VoIP Gateways / Routers
Integrated Access Devices
Fiber to the Premise/Home (FTTP/H)
Optical Network Terminals (ONT)
Set Top Boxes
Wireless Local Loop
PBX
ISDN NT1/TA
FEATURES
Performs complete BORSCHT functions for two channels on a
single device
Internal balanced ringing up to 90VPK (5REN up to 4kft)
Integrated Power Management
▫ Integrated DC-DC controller regulates battery voltage to
minimize power dissipation in all operating modes
Programmable linefeed characteristics
▫ Ringing frequency, amplitude, cadence
▫ Trapezoidal and Sinusoidal waveforms
▫ Two-wire AC impedance, transhybrid balance
▫ Constant Current feed (20 to 41mA)
▫ Ring trip and loop closure thresholds
Programmable signal generation
▫ DTMF generation and detection
▫ Metering pulse generation (12/16kHz)
▫ Enhanced Caller ID (FSK) generation (Type I and Type II)
▫ Tone generation (up to four simultaneous)
▫ G.711 μ-Law/A-Law / 16-bit linear PCM audio
Loop test and diagnostics support
▫ Integrated loopback modes
▫ Realtime linefeed monitoring
▫ On-chip temperature sensor
PCM and SPI bus digital interfaces
▫ PCM Master and Slave modes supported
On-chip PLL for flexible clocking options including 1MHz / 2MHz
3.3V operation
Small Footprint Packages: LQFP-64, QFN-64
Sigma/delta
DAC
Sigma/delta
ADC
Line Feed
DACs
Line Monitor
ADC
DC / DC
Control
Conditioning
PCM Filters
Gain Adjust
Signaling
Tone
Metering Pulse
Generation
Generation
Ringing
Generation
DTMF
Generation
FSK
Generation
DTMF
Detection
PCM
Ring Trip
Detection
Loop
Supervision
Loopback
Control
Loop Closure
Line
Mode
SPI
Detection
Diagnostic
Control
Thermal
Loop Supervision ^Supervision
DC feed
Algorithm _{DC/DC Supervision}
PLL
Dual
Single
W682388
Revision 1.1 - 01/2008