W27L02 Datasheet, PDF (1/15 Pages) Winbond – 256K X 8 ELECTRIC ALLY ERASABLE EPROM

W27L02
256K × 8 ELECTRICALLY ERASABLE EPROM
1. GENERAL DESCRIPTION
The W27L02 is a high speed, low power consumption Electrically Erasable and Programmable Read
Only Memory organized as 262,144 x 8 bits. It requires only one supply in the range of 3.3V ±10% in
normal read mode. The W27L02 provides an electrical chip erase function.
2. FEATURES
• Wide range for power supply voltage:
3.3V ±10%
• High speed access time: 70/90 nS (max.)
• Read operating current: 15 mA (max.)
• Erase/Programming operating current:
30 mA (max.)
• Standby current: 20 µA (max.)
• +12V erase/programming voltage
• Fully static operation
• All inputs and outputs directly TTL/CMOS
compatible
• Three-state outputs
• Available packages: 32-lead PLCC and 32-lead
STSOP
3. PIN CONFIGURATIONS
4. BLOCK DIAGRAM
#
AAA V V PA
1 1 1 p D G1
2 5 6 p D M7
VDD
Vss
V_PP
#PGM
#CE
#OE
CONTROL
Q0
OUTPUT
.
BUFFER
.
Q7
4321 33 3
A7
5
2 1 0 ₂₉
A14
A6
6
28
A13
A5
7
27
A8
A4
A3
8
9
32-lead PLCC
26
25
A9
A11
A2
10
24
#OE
A1
11
23
A10
A0
Q0
12 _{1 1 1 1} 1 1 2 22
13 4 5 6 7 8 9 0 21
#CE
Q7
A0
.
DECODER
.
A17
CORE
ARRAY
A11
1
A9
2
A8
3
A13
4
A14
5
A17
6
#PGM
7
V DD
8
V PP
9
A16
10
A15
11
A12
12
A7
13
A6
14
A5
15
A4
16
Q QV Q QQQ
1 2s 3 456
s
32-lead STSOP
32
#OE
31
A10
30
#CE
29
Q7
28
Q6
27
Q5
26
Q4
25
Q3
24
V SS
23
Q2
22
Q1
21
Q0
20
A0
19
A1
18
A2
17
A3
5. PIN DESCRIPTION
SYMBOL
A1 − A17
Q0 − Q7
#CE
#OE
#PGM
VPP
VDD
Vss
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable
Program Enable
Program/Erase Supply Voltage
Power Supply
Ground
No Connection
Publication Release Date: February 20, 2003
-1-
Revision A3