W26020A Datasheet, PDF (1/10 Pages) Winbond – 128K X 16 High Speed CMOS Static RAM

W26020A
128K × 16 HIGH-SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W26020A is a high-speed, low-power CMOS static RAM organized as 131,072 × 16 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
The W26020A has an active low chip select, separate upper and lower byte selects, and a fast output
enable. No clock or refreshing is required. Separate byte select controls (LB and UB ) allow
individual bytes to be written and read. LB controls I/O1-I/O8, the lower byte. UB controls I/O9−
I/O16, the upper byte. This device is well suited for use in high-density, high-speed system
applications.
FEATURES
• High speed access time: 20/25 nS (max.)
• Low power consumption:
− Active: 1.5W (max.)
• Single +5V power supply
• Fully static operation
− No clock or refreshing
• All inputs and outputs directly TTL compatible
• Three-state outputs
• Data byte control
− LB (I/O1−I/O8), UB (I/O9−I/O16)
• Available packages: 44-pin type two TSOP
PIN CONFIGURATION
BLOCK DIAGRAM
A0
1
A1
2
A2
3
A3
4
A4
5
CS
6
I/O1
7
I/O2
8
I/O3
9
I/O4
10
VDD
11
VSS
12
I/O5
13
I/O6
14
I/O7
15
I/O8
16
WE
17
A5
18
A6 19
A7
20
A8
21
A16 22
44
A15
43
A14
42
A13
41
OE
40
UB
39
LB
38
I/O16
37
I/O15
36
I/O14
35
I/O13
34
VSS
33
VDD
32
I/O12
31
I/O11
30
I/O10
29
I/O9
28
NC
27
A12
26
A11
25
A10
24
A9
23
NC
VDD
VSS
A0
.
.
A16
DECODER
CORE
ARRAY
UB
CS
OE
CONTROL
WE
LB
DATA I/O
I/O1
.
.
I/O16
PIN DESCRIPTION
SYMBOL
A0−A16
I/O1−I/O16
CS
WE
OE
LB
UB
VDD
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable Input
Output Enable Input
Lower Byte Select I/O1−I/O8
Upper Byte Select I/O9−I/O16
Power Supply
Ground
No Connection
Publication Release Date: July 1998
-1-
Revision A3