W25P243A Datasheet, PDF (1/18 Pages) Winbond – 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM

W25P243A
64K × 64 BURST PIPELINED HIGH-SPEED
CMOS STATIC RAM
GENERAL DESCRIPTION
The W25P243A is a high-speed, low-power, synchronous-burst pipelined, CMOS static RAM
organized as 65,536 × 64 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst
address counter supports both Pentium™ burst mode and linear burst mode. The mode to be
executed is controlled by the LBO pin. Pipelining or non-pipelining of the data outputs is controlled by
the FT pin. A snooze mode can reduce power dissipation.
W25P243A supports 2T/1T mode, while disable data output within one cycle in a burst read when the
device is deselected by CE2/ CE3 .
This device supports 3-1-1-1-2-1-1-1 in a two-bank, back-to-back burst read cycle.
FEATURES
• Synchronous operation
• High-speed access time: 4.5/5/6 nS (max.)
• Single +3.3V power supply
• Individual byte write capability
• 3.3V LVTTL compatible I/O
• Clock-controlled and registered input
• Asynchronous output enable
• Pipelined data output capability
• Supports snooze mode (low-power state)
• Internal burst counter supports Intel burst
(Interleaved) mode & linear burst mode
• Support 2T/1T mode
• Packaged in 128-pin QFP and TQFP
BLOCK DIAGRAM
A(15:0)
CLK
CE(3:1)
GW
BWE
BW(8:1)
OE
ADSC
ADSP
ADV
LBO
ZZ
INPUT
REGISTER
CONTROL
LOGIC
REGISTER
64K X 64
CORE
ARRAY
DATA I/O
REGISTER
I/O(64:1)
Publication Release Date: August 1999
-1-
Revision A3