8050HXLT1 Datasheet, PDF (1/3 Pages) WILLAS ELECTRONIC CORP – General Purpose Transistors

WILLAS
FM120-M+
8050HxLT1THRU
G_1.0Ae_Sn_URe_FAr_Ca_El_MP_OUu_NTr_Sp_CHo_Os_TTe_KYT_BAr_Ra_RIn_ERs_Ri_Es_CTt_IFo_IEr_Rs_{S -20V- 200V}
FM1200-M+
SOD-123+ PACKAGE
Pb Free Product
Features
• Batch process design, excellent power dissipation offers
Package outline
better reverse leakage current and thermal resistance.
NPN Silicon • Low profile surface mounted application in order to
optimize board space.
SOD-123H
• Low power loss, high efficiency.
FE^• A^HT^igU^hR^cE^{urrent capability, low forward voltage drop.}
• High surge capability.
ƽ_• H_Gi_ug_ah_rc_du_rr_ir_ne_gnt_f
capacity in compact
or overvoltage prot
package.
ection.
• U^IClt⁼r¹a^.5h^Aig^.h-speed switching.
ƽ_• E_Sp_ili_it_ca_ox_nial_ep_pl_ia_tn_aa_xr_iaty_l p_pe_la. _{nar chip, metal silicon junction.}
0.146(3.7)
0.130(3.3)
0.012(0.3) Typ.
0.071(1.8)
0.056(1.4)
ƽ• NLePaNdc-formeeplpemaretsntm: e8e0t5e0nHvironmental standards of
ƽ^MW^Ie^L-d^Se^Tc^Dla^-r¹e⁹t⁵h⁰a⁰t ^/th²e²⁸material of product compliance with RoHS requirements.
• R_Po_bH_-S_Frp_er_eod_pu_ac_ct f_ko_ar _gp_eac_ik_sin_ag_vc_ao_id_lae_bs_lu_effix "G"
SOT–23
H_Ra_olo_Hg_Sen_pf_rr_oe_de_up_cr_tod_fou_rct_pf_ao_cr _kp_ia_nc_gki_cn_og_dc_eod_se_ufs_fiu_xff_”ix_G"_”H"
M_He_ac_loh_gea_nn_fri_ec_e a_prl_od_dua_ctt_fa_{or packing code suffix “H”}
• Epoxy : UL94-V0 rated flame retardant
DEVICE MARKING AND ORDERING INFORMATION
• Case : Molded plastic, SOD-123H
Device
Marking
Sh,ipping
• Terminals :Plated terminals, solderable per MIL-STD-750
y _{8050HPLT1 Method 2026}
1HA
3000/Tape&Reel
r _{• 8P0o5l0aHriQtyL:TI1ndicated by cathode1HbCand}
3000/Tape&Reel
COLLECTOR
3
0.040(1.0)
0.024(0.6)
0.031(0.8) Typ.
1
BASE
0.031(0.8) Typ.
2
EMITTER
Dimensions in inches and (millimeters)
• ₈M₀o₅₀u_Hnt_Rin_Lg_T1Position : Any
1HE
3000/Tape&Reel
a _{• Weight : Approximated 0.011 gram}
8050HSLT1
1HG
3000/Tape&Reel
in ^{MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS}
Ra_Mtin_Ags_Xa_IMt 2_U5_M℃ _Ra_Am_Tb_Iie_Nn_Gt t_Semperature unless otherwise specified.
Single phase half w_Ra_av_te_in, _g60Hz, resistive of inductive load. _Symbol
Max
Unit
For cap_Ca_oc_li_lt_eiv_ce_tol_ro_-a_Ed_m, _id_tte_er_ra_Vte_olc_tau_grr_eent by 20%
VCEO
25
V
lim ^{Collector-BaseRVAoTltIaNgGeS}
SYMBOLVFCMBO120-MH FM130-4M0H FM140-MH FVM150-MH FM160-MH FM180-MH FM1100-MH FM1150-MH FM1200-MH
MarkingECmoditeter-Base Voltage
VEBO12
13 5 14 V 15
16
18
10
115 120
MaximumCoRlleeccutorrrenCtuPrreeankt-RceovnetrinseuoVuonltage
VRRM IC 20
301500 40 mAd5c0
60
80
100
150
200
Maximum RMS Voltage
e _{MaxTimHuEmRDMCABLlocCkiHngAVRoAltaCgTe ERISTICS}
r _{Maximum Average ForwCarhdaRreacctiftieedriCsutircrent}
VRMS
14
21
28
35
42
56
70
105
140
VDC
20
30
40
50
60
80
100
150
200
IO
Symbol
Max
Unit
1.0
Total Device Dissipation FR-5 Board,(1)
Peak Forward Surge Current 8.3 ms single half sine-wave
P _{superimpoTseA=d2o5n°Crated load (JEDEC method)}
IFSM
PD
225
mW
30
Typical Th^De^erm^raa^tel R^ae^bs^ois^vt^ean²c⁵e^°C(Note 2)
Typical Ju_Tn_hc_eti_ro_mn _aC_la_Rp_ea_sc_iit_sa_tn_ac_ne_ce(N_,Jo_ut_ne_c1_ti)_{on to Ambient}
Operating Temperature Range
Storage T^Te^om^tap^le^Dra^etu^vr^ice^eR^Dan^isg^se^ipation
RΘJA
CJ
TJ
TSTG
1.8
R θJ A_{-55 to +125}556
PD
mW/°C
°C/W
40
120
- 65 to +175
-55 to +150
Alumina Substrate,(2) TA=25°C
Derate ab^Cov^He^A2^R5^A°^CC^TERISTICS
Maximum Forward Voltage at 1.0A DC
300
mW
SYMBOL
VF
FM120-MH
FM130-MH F₂M_.1₄40-MH
0.50
FM_m1_W50_/°-M_CH FM160-MH
0.70
FM180-MH FM1100-MH
0.85
FM1150-MH
0.9
FM1200-MH
0.92
Maximum_TA_hv_ee_rr_mag_ae_{l R}R_esv_ie_sr_ts_ae_nC_ceu_,r_Jre_unt_ca_tit_on@_toT_AA_m=2_b5_ie℃_nt
IR
R θJ A
417
°C/W
0.5
Rated DC_JB_ul_no_cc_tk_ioin_ng _aV_no_dlta_Sg_te_{orage Tempe}@_ratT_uA_re=125℃
T j,T St g
-55 to +150 °C
10
NOTES:
1- Measured at 1 MHZ and applied reverse voltage of 4.0 VDC.
2- Thermal Resistance From Junction to Ambient
2012-^2012-06
WILLAS^WE^ILL^LE^AC^ST^ER^LO^EN^CI^TC^RC^OO^NIR^CP^C. ^ORP