W3DG7217V-D2 Datasheet, PDF (4/6 Pages) White Electronic Designs Corporation – 128MB - 16Mx72 SDRAM UNBUFFERED

White Electronic Designs
W3DG7217V-D2
PRELIMINARY
Parameters
Operating Current
(One bank active)
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non-Power Down Mode
Active standby current in
power-down mode
OPERATING CURRENT CHARACTERISTICS
VCC = 3.3V, 0°C ≤ TA ≤ 70°C
Symbol
Conditions
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0mA
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
Input signals are charged one time during 20
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
CKE ≥ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
Versions
Units
Note
133/100
810
mA
1
20
mA
20
mA
180
mA
90
mA
50
mA
50
Active standby in current non power-
down mode
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are charged one time during 20ns
270
mA
Operating current (Burst mode)
Refresh current
Self refresh current
ICC3NS
ICC4
ICC5
ICC6
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
input signals are stable
Io = mA
Page burst
4 Banks activated
tCCD = 2CLK
tRC ≥ tRC(min)
CKE ≤ 0.2V
225
mA
990
mA
1
1,800
mA
2
20
mA
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VCC/VSSQ)
May 2004
Rev. 2
4
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