W3DG6430V-D2 Datasheet, PDF (4/6 Pages) White Electronic Designs Corporation – 256MB - 32M x 64 BUFFERED SDRAM MODULE

White Electronic Designs
W3DG6430V-D2
PRELIMINARY
OPERATING CURRENT CHARACTERISTICS
VCC = 3.3V, 0°C ≤ TA ≤ 70°C
Parameters
Symbol Conditions
Versions
Units
Note
100
Operating Current
(One bank active)
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non-Power Down Mode
Active standby current in power-
down mode
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0mA
CKE ≤ VIL(max), tCC = 10ns
CKE & CK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
Input signals are charged one time during 20
CKE ≥ VIH(min), CK ≤ VIL(max), tCC= ∞
Input signals are stable
CKE ≥ VIL(max), tCC = 10ns
CKE & CK ≤ VIL(max), tCC = ∞
mA
1
1700
40
mA
40
mA
350
mA
180
mA
90
mA
90
Active standby in current non power- ICC3N
down mode
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are charged one time during 20ns
mA
500
ICC3NS
CKE ≥ VIH(min), CK ≤ VIL(max), tCC = ∞
input signals are stable
Operating current (Burst mode)
Refresh current
ICC4
Io = mA
Page burst
4 Banks activated
tCCD = 2CK
ICC5
tRC ≥ tRC(min)
Self refresh current
ICC6
CKE ≤ 0.2V
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VCC/VSSQ)
mA
500
mA
1
1700
3300
mA
2
40
mA
February 2002
Rev. 0
4
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