WV3EG128M72EFSR-D3 Datasheet, PDF (1/13 Pages) White Electronic Designs Corporation – 1GB - 128Mx72 DDR SDRAM REGISTERED w/PLL, FBGA

White Electronic Designs ^{WV3EG128M72EFSR-D3}
ADVANCED*
1GB – 128Mx72 DDR SDRAM REGISTERED w/PLL, FBGA
FEATURES
Double-data-rate architecture
DDR266 and DDR333
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power Supply:
• VCC = VCCQ = +2.5V ±0.2V (100, 133 and
166MHz)
184 pin DIMM package
PCB height:
• D3: 29.97mm (1.18")
NOTE: Consult factory for availability of:
• Lead-Free Products
• Vendor source control options
• Industrial temperature options
DESCRIPTION
The WV3EG128M72EFSR is a 128Mx72 Double Data
Rate SDRAM memory module based on 512Mb DDR
SDRAM component. The module consists of eighteen
64Mx8 DDR components in FBGA packages mounted on
a 184 Pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lenths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
Clock Speed
CL-tRCD-tRP
OPERATING FREQUENCIES
DDR333 @CL=2.5
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
March 2005
Rev. 0
1
White Electronic Designs Corporation • [phone] • www.wedc.com