WS512K32V-XXX Datasheet, PDF (1/7 Pages) White Electronic Designs Corporation – 512Kx32 SRAM 3.3V MULTICHIP PACKAGE

White Electronic Designs
WS512K32V-XXX
512Kx32 SRAM 3.3V MULTICHIP PACKAGE
FEATURES
Access Times of 15, 17, 20ns
Low Voltage Operation
Packaging
• 66-pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
• 68 lead, 22.4mm (0.880 inch) CQFP, (G2U),
3.56mm (0.140"), (Package 510)
Organized as 512Kx32; User Configurable as
2x512Kx16 or 4x512Kx8
Commercial, Industrial and Military Temperature
Ranges
Low Voltage Operation:
• 3.3V ± 10% Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Fully Static Operation:
• No clock or refresh required.
Three State Output.
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
WS512K32V-XG2UX - 8 grams typical
WS512K32NV-XH1X - 13 grams typical
* This product is subject to change without notice.
PIN CONFIGURATION FOR WS512K32NV-XH1X
Top View
1
12
23
34
45
56
I/O8
WE2# I/O15
I/O24
VCC
I/O31
I/O9
CS2# I/O14
I/O25 CS4#
I/O30
I/O10
GND
I/O13
I/O26 WE4#
I/O29
A13
I/O11
I/O12
A6
I/O27
I/O28
A14
A10
OE#
A7
A3
A0
Pin Description
I/O0-31
A0-18
WE1-4#
CS1-4#
OE#
VCC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
A15
A11
A18
A16
A12
WE1#
A17
VCC
I/O7
NC
A4
A8
A5
A9 WE3#
A1
A2
I/O23
Block Diagram
OE#
A0-18
WE1# CS1#
WE2# CS2#
WE3# CS3#
I/O0
CS1# I/O6
I/O16 CS3#
I/O22
512K x 8
512K x 8
512K x 8
I/O1
NC
I/O5
I/O2
I/O3
I/O4
11
22
33
I/O17 GND
I/O21
I/O18
I/O19
I/O20
44
55
66
8
I/O0-7
8
I/O8-15
8
I/O16-23
WE4# CS4#
512K x 8
8
I/O24-31
March 2006
Rev. 12
1
White Electronic Designs Corporation • [phone] • www.wedc.com