W3EG7263S-D3 Datasheet, PDF (1/13 Pages) White Electronic Designs Corporation – 512MB- 64Mx72 DDR SDRAM REGISTERED w/PLL

White Electronic Designs
W3EG7263S-D3
-JD3
-AJD3
PRELIMINARY*
512MB- 64Mx72 DDR SDRAM REGISTERED w/PLL
FEATURES
DESCRIPTION
Double-data-rate architecture
Clock Speeds: 100MHz, 133MHz and 166MHz
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power supply: VCC: 2.5V ± 0.2V
JEDEC standard 184 pin DIMM package
• Package height options:
JD3: 30.48mm (1.20") and
AJD3: 28.70mm (1.13")
The W3EG7263S is a 64Mx72 Double Data Rate
SDRAM memory module based on 256Mb DDR SDRAM
component. The module consists of eighteen 64Mx4 DDR
SDRAMs in 66 pin TSOP package mounted on a 184 Pin
FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lenths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
This product is under development, is not qualified or characterized and is subject to
change without notice.
Clock Speed
CL-tRCD-tRP
DDR333 @CL=2.5
166MHz
2.5-3-3
OPERATING FREQUENCIES
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
April 2004
Rev. # 2
1
White Electronic Designs Corporation • [phone] • www.wedc.com