W3EG2256M72ASSR-JD3 Datasheet, PDF (1/14 Pages) White Electronic Designs Corporation – 4GB - 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL

White Electronic Designs
W3EG2256M72ASSR-JD3
-AJD3
PRELIMINARY*
4GB – 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL
FEATURES
Double-data-rate architecture
DDR200, and DDR266:
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Dual Rank
Power supply: VCC = 2.5V ± 0.2V
JEDEC standard 184 pin DIMM package
• Package height options:
JD3: 30.48mm (1.2"),
AJD3: 28.70mm (1.13")
DESCRIPTION
The W3EG2256M72ASSR is a 2x256Mx72 Double
Data Rate SDRAM memory module based on 1Gb DDR
SDRAM components. The module consists of eighteen
512Mx4 stacks, in 66 pin TSOP packages mounted on
a 184 pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges and Burst Lengths allow the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
Clock Speed
CL-tRCD-tRP
OPERATING FREQUENCIES
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
November, 04
Rev. 3
1
White Electronic Designs Corporation • [phone] • www.wedc.com