W3DG6465V-D2 Datasheet, PDF (1/6 Pages) White Electronic Designs Corporation – 512MB - 64Mx64, SDRAM UNBUFFERED

White Electronic Designs
W3DG6465V-D2
FINAL
512MB - 64Mx64, SDRAM UNBUFFERED
FEATURES
DESCRIPTION
PC100 and PC133 compatible
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the
positive edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V ± 0.3V Power Supply
168 Pin DIMM JEDEC
The W3DG6465V is a 64Mx64 synchronous DRAM
module which consists of eight 32Mx16 SDRAM
components in TSOP II package and one 2K EEPROM
in an 8 Pin TSSOP package for Serial Presence Detect
which are mounted on a 168 Pin DIMM multilayer FR4
Substrate.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
Pin Front Pin
1
VSS
29
2 DQ0 30
3 DQ1 31
4 DQ2 32
5 DQ3 33
6
VDD
34
7 DQ4 35
8 DQ5 36
9 DQ6 37
10 DQ7 38
11 DQ8 39
12
VSS
40
13 DQ9 41
14 DQ10 42
15 DQ11 43
16 DQ12 44
17 DQ13 45
18
VDD
46
19 DQ14 47
20 DQ15 48
21
NC
49
22
NC
50
23 Vss 51
24
NC
52
25
NC
53
26
VDD
54
27 WE# 55
28 DQM0 56
Front
DQM1
CS0#
DNU
VSS
A0
A2
A4
A6
A8
A10/AP
BA1
VDD
VDD
CK0
VSS
DNU
CS2#
DQM2
DQM3
DNU
VDD
NC
NC
NC
NC
VSS
DQ16
DQ17
Pin Front Pin Back Pin Back Pin
57 DQ18 85
VSS
113 DQM5 141
58 DQ19 86 DQ32 114 CS1# 142
59
VDD
87 DQ33 115 RAS# 143
60 DQ20 88 DQ34 116 VSS
144
61
NC
89 DQ35 117 A1
145
62
NC
90
VCC
118
A3
146
63 CKE1 91 DQ36 119 A5
147
64
VSS
92 DQ37 120 A7
148
65 DQ21 93 DQ38 121 A9
149
66 DQ22 94 DQ39 122 BA0 150
67 DQ23 95 DQ40 123 A11 151
68
VSS
96
VSS
124
VDD
152
69 DQ24 97 DQ41 125 NC
153
70 DQ25 98 DQ42 126 A12 154
71 DQ26 99 DQ43 127 VSS
155
72 DQ27 100 DQ44 128 CKE0 156
73
VDD
101 DQ45 129 CS3# 157
74 DQ28 102 VDD 130 DQM6 158
75 DQ29 103 DQ46 131 DQM7 159
76 DQ30 104 DQ47 132 NC
160
77 DQ31 105 NC
133
VDD
161
78
VSS
106
NC
134
NC
162
79 CK2 107 VSS 135 NC
163
80
NC 108 NC 136 NC
164
81 *WP 109 NC 137 NC
165
82 **SDA 110
VDD
138
VSS
166
83 **SCL 111 CAS# 139 DQ48 167
84
VDD
112 DQM4 140 DQ49 168
Back
DQ50
DQ51
VDD
DQ52
NC
NC
DNU
VSS
DQ53
DQ54
DQ55
VSS
DQ56
DQ57
DQ58
DQ59
VDD
DQ60
DQ61
DQ62
DQ63
VSS
NC
NC
**SA0
**SA1
**SA2
VDD
PIN NAMES
A0 – A12
BA0-1
DQ0-63
CK0,CK3
CKE0, CKE1
CS0# - CS3#
RAS#
CAS#
WE#
DQM0-7
VDD
VSS
SDA
SCL
DNU
NC
Address input (Multiplexed)
Select Bank
Data Input/Output
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Serial data I/O
Serial clock
Do not use
No Connect
* WP (write protect) option is available on Pin 81,
see ordering information on page 5.
** These pins should be NC in the system which
does not support SPD.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. # 1
1
White Electronic Designs Corporation • [phone] • www.wedc.com