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EDI9LC644V Datasheet, PDF (1/25 Pages) White Electronic Designs Corporation – 128Kx32 SSRAM/1Mx32 SDRAM
EDI9LC644V
128Kx32 SSRAM/1Mx32 SDRAM
EXTERNAL MEMORY SOLUTION FOR TEXAS INSTRUMENTS TMS320C6000 DSP
FEATURES
n Clock speeds:
• SSRAM: 200, 166,150, and 133 MHz
• SDRAMs: 125 and 100 MHz
n DSP Memory Solution
• Texas Instruments TMS320C6201
• Texas Instruments TMS320C6701
n Packaging:
• 153 pin BGA, JEDEC MO-163
n 3.3V Operating supply voltage
n Direct control interface to both the SSRAM and SDRAM
ports on the “C6x”
n Common address and databus
n 65% space savings vs. monolithic solution
n Reduced system inductance and capacitance
FIG. 1 PIN CONFIGURATION
DESCRIPTION
The EDI9LC644VxxBC is a 3.3V, 128K x 32 Synchronous
Pipeline SRAM and a 1Mx32 Synchronous DRAM array con-
structed with one 128K x 32 SBSRAM and two 1Mx16
SDRAM die mounted on a multilayer laminate substrate. The
device is packaged in a 153 lead, 14mm by 22mm, BGA.
The EDI9LC644VxxBC provides a total memory solution for
the Texas Instr uments TMS320C6201 and the
TMS320C6701 DSPs
The Synchronous Pipeline SRAM is available with clock
speeds of 200, 166,150, and 133 MHz, allowing the user
to develop a fast external memory for the SSRAM inter-
face port .
The SDRAM is available in clock speeds of 125 and 100
MHz, allowing the user to develop a fast external memory
for the SDRAM interface port .
BOTTOM VIEW
1
2
3
4
5
6
A DQ19 DQ23 VCC VSS VSS VSS
B DQ18 DQ22 VCC VSS SDCE VSS
C VCCQ VCCQ VCC SDWE SDA10 NC
D DQ17 DQ21 VCC VSS VSS VSS
E DQ16 DQ20 VCC VSS SDCLK VSS
F VCCQ VCCQ VCC VSS VSS VSS
G NC NC NC SDRAS SDCAS VSS
H NC NC
A8 VSS VSS NC
J A6 A7 A9 VSS VSS NC
K NC/A17 NC/A18 NC/A19 VSS VSS NC
L NC NC NC BWE2 BWE3 NC
M VCCQ VCCQ VCC BWE0 BWE1 NC
N DQ12 DQ11 VCC VSS VSS VSS
P DQ13 DQ10 VCC VSS SSCLK VSS
R VCCQ VCCQ VCC VSS VSS VSS
T DQ14 DQ9 VCC SSADC SSWE NC
U DQ15 DQ8 VCC SSOE SSCE NC
1
2
3
4
5
6
7
8
9
VCC DQ24 DQ28 A
VCC DQ25 DQ29 B
VCC VCCQ VCCQ C
VCC DQ26 DQ30 D
VCC DQ27 DQ31 E
VCC VCCQ VCCQ F
A2
A4
A5 G
A1
A3
A10 H
A0 A11 A12 J
NC A13 A14 K
NC A15 A16 L
VCC VCCQ VCCQ M
VCC DQ4 DQ0 N
VCC DQ5 DQ1 P
VCC VCCQ VCCQ R
VCC DQ6 DQ2 T
VCC DQ7 DQ3 U
7
8
9
PIN DESCRIPTION
A0-16
DQ0-31
SSCLK
SSADC
Address Bus
Data Bus
SSRAM Clock
SSRAM Address Status Control
SSWE
SSOE
SDCLK
SDRAS
SSRAM Write Enable
SSRAM Output Enable
SDRAM Clock
SDRAM Row Address Strobe
SDCAS SDRAM Column Address Strobe
SDWE
SDRAM Write Enable
SDA10
BWE0-3
SDRAM Address 10/auto precharge
SSRAM Byte Write Enables
SDRAM SDQM 0 - 3
SSCE
Chip Enable SSRAM Device
SDCE
VCC
VCCQ
Chip Enable SDRAM Device
Power Supply pins, 3.3V
Data Bus Power Supply pins,
3.3V (2.5V future)
VSS
Ground
NC
No Connect
January 2002 Rev. 4
ECO# 14667
1
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