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EDI8L32512V Datasheet, PDF (1/8 Pages) White Electronic Designs Corporation – 512Kx32 SRAM Module.3.3V
White Electronic Designs
EDI8L32512V
512Kx32 SRAM Module.3.3V
FEATURES
 DSP Memory Solution
 ADSP-21060L (SHARC)
 ADSP-21062L (SHARC)
 Texas Instruments TMS320LC31
 RISC Memory Solution
 MPC860 (Power Quic)
 Random Access Memory Array
 Fast Access Times: 12, 15, 17, and 20ns
 Individual Byte Enables
 User configuration organization with Minimal
Additional Logic
 Master Output Enable and Write Control
 TTL Compatible Inputs and Outputs
 Fully Static, No Clocks
 Surface Mount Package
 68 Lead PLCC, No. 99 JEDEC MO-47AE
 Small Footprint, 0.990 Sq. In.
 Multiple Ground Pins for Maximum Noise
Immunity
 Single +3.3V (±5%) Supply Operation
FIG. 1
PIN CONFIGURATIONS
DQ17 10
DQ18 11
DQ19 12
VSS 13
DQ20 14
DQ21 15
DQ22 16
DQ23 17
VCC 18
DQ24 19
DQ25 20
DQ26 21
DQ27 22
VSS 23
DQ28 24
DQ29 25
DQ30 26
60 DQ14
59 DQ13
58 DQ12
57 VSS
56 DQ11
55 DQ10
54 DQ9
53 DQ8
52 VCC
51 DQ7
50 DQ6
49 DQ5
48 DQ4
47 VSS
46 DQ3
45 DQ2
44 DQ1
DESCRIPTION
The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM.
The device is available with access times of 12, 15, 17 and
20ns allowing the creation of a no wait state DSP and RISC
microprocessor memory solutions.
The device can be configured as a 512K x 32 and used to
create a single chip external data memory solution for TI's
TMS320LC31 (figure 5), or Analog's SHARCTM DSP (figure
6).
The device provides a 56% space savings when compared
to four 512Kx8, 36 pin SOJs. In addition the EDI8K32512V
has only a 10pF load on the data lines vs. 32 pF for four
plastic SOJs.
The device provides a memory upgrade of the EDI8F32256V
(256K x 32) or the EDI8L32128V (128K x 32) (figure 8).
Alternatively, the device's chip enables can configure it as
a 1M x 16. A 1M x 48 program memory array for Analog's
CHARC DSP is created using three devices (figure 7). If
this memory is too deep, two 512K x 24s (EDI8L24512V)
can be used to create a 512K x 48 array or two 128K x
24s (EDI8L24128V) can be used to create a 128K x 48
array.
Note: Soldier Reflow Temperature should not exceed 260°C for 10 seconds.
PIN DESCRIPTION
A0-A18
Address Inputs
E0#-E3#
Chip Enables
(One per Byte)
W#
Master Write Enable
G#
Master Output Enable
DQ0-DQ31
Common Data
Input/Output
VCC
Power (+3.3V±5%)
VSS
Ground
NC
No Connectiona
BLOCK DIAGRAM
A0-18
G#
19
W#
E0#
E1#
E2#
E3#
512K x 32
Memory
Array
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October. 2000
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com