EDI8L24128C Datasheet, PDF (1/5 Pages) White Electronic Designs Corporation – 128Kx24 Asynchronous SRAM, 5V

White Electronic Designs
EDI8L24128C
128Kx24 Asynchronous SRAM, 5V
FEATURES
 128Kx24 bit CMOS Static
 Random Access Memory Array
 Fast Access Times: 12 and 15ns
 Master Output Enable and Write Control
 TTL Compatible Inputs and Outputs
 Fully Static, No Clocks

Surface Mount Package
 119 Lead BGA (JEDEC MO-163), No. 391
 Small Footprint, 14mm x 22mm
 Multiple Ground Pins for Maximum Noise
Immunity

Single +5V (±10%) Supply Operation

DSP Memory Solution
 Motorola DSP5600x™
 Analog Devices SHARC™
DESCRIPTION
The EDI8L24128CxxBC is a 5V, three megabit SRAM
constructed with three 128Kx8 die mounted on a multi-
layer laminate substrate. With 12 to 15ns access times, x24
width and a 5V operating voltage, the EDI8L2418C is ideal
for creating a single chip memory solution for the Motorola
DSP5600x or a two chip solution for the Analog Devices
SHARC™ DSP.
The single or dual chip memory solutions offer improved
system performance by reducing the length of board traces
and the number of board connections compared to using
multiple monolithic devices. For example, the capacitance
load on the data lines for the BGA package is 58% less than
a monolithic SOJ solution.
The JEDEC Standard 119 lead BGA provides a 44% space
savings over using 128Kx8, 300mm wide SOJs and the
BGA package has a height of 100mm compared to 148mm
for the SOJ packages.
FIG. 1 PIN CONFIGURATION
1
2
34
5
6
7
A
NC A0
A1
A2
A3
A4 NC
B
NC A5
A6
E
A7
A8 NC
C DQ12 NC NC NC NC NC DQ0
D DQ13 VCC GND GND GND VCC DQ1
E
DQ14 GND VCC GND VCC GND DQ2
F
DQ15 VCC GND GND GND VCC DQ3
G DQ16 GND VCC GND VCC GND DQ4
H DQ17 VCC GND GND GND VCC DQ5
I
NC GND VCC GND VCC GND NC
J
DQ18 VCC GND GND GND VCC DQ6
K
DQ19 GND VCC GND VCC GND DQ7
L
DQ20 VCC GND GND GND VCC DQ8
M DQ21 GND VCC GND VCC GND DQ9
N
DQ22 VCC GND GND GND VCC DQ10
O DQ23 NC NC NC NC NC DQ11
P
NC
A9
A10
W
A11
A12 NC
Q
NC
A13
A14
G
A15
A16 NC
Pin DESCRIPTION
A0-16
E#
W#
G3
DQ0-23
VCC
GND
NC
Address Inputs
Chip Enables
Master Write Enable
Master Output Enable
Common Data
Input/Output
Power (+5V±10%)
Ground
No Connection
A0-A16
G#
W#
E#
128K x 24
Memory
Array
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2002
Rev. 1
1
White Electronic Designs Corporation • [phone] • www.wedc.com