SCA8X0 Datasheet, PDF (32/35 Pages) VTI technologies – VTI Automotive Digital Accelerometer Platform

SCA8X0/21X0/3100 Series
• Specified operation voltage (VDD) range 3.05...3.6 V
6 To achieve high EMC DPI performance, add serial inductance (L1) to VDD line
before serial resistance (for example Murata: BLM18HG102S)
VDD
Note 1
L1
R1
10 Ω
C6
CSB
MISO
10 µF
C4
100 nF
SCA8x0
SCA21x0
SCA3100
1
NC
2 _NC
3
AVSS
4 _AVDD
5 _CSB
6 _MISO
12
EGND
DVSS ¹¹
10 ^C5
DVDD
PWM ^{9 100 nF}
MOSI ⁸
SCK ⁷
Figure 9: Recommended circuit diagram
MOSI
SCK
6.6 Recommended PWB layout
Recommended PWB layout for all product family components with SPI interface is shown in Figure
10 and Figure 11. Following design rules and recommendations should be considered:
Required:
1 Connect (C4) 100 nF SMD capacitor between AVDD and AVSS right next to
component pins AVDD and AVSS
2 Connect (C5) 100 nF SMD capacitor between DVDD and DVSS right next to
component pins DVDD and DVSS
3 Use separate ground levels AVSS and DVSS under and near the component
but connect them together on the PCB, see Figure 10
4 Locate ground plate under component
5 Do not route signals or power supplies under the component on top layer
6 Ensure good ground connection of Egnd (pin12) to AVSS
Recommended:
7 Locate digital ground under digital signal lines
8 Do not route digital signals one upon the other for long distance
9 Avoid crossing of AVDD path with digital signal especially between serial
resistance R1 and AVDD pin
10 Do not route digital signals under the component on 2nd layer
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