VSC8601XKN Datasheet, PDF (47/102 Pages) Vitesse Semiconductor Corporation – VSC8601 10/100/1000BASE-T PHY with RGMII MAC Interface

VSC8601 Datasheet
Configuration
Table 21.
1000BASE-T Status Extension 2, Address 17 (0x11) (continued)
Bit Name
Access Description
Default
9
1000BASE-T SSD
error
RO This is a self-clearing bit.
0
1 = Start-of-stream delimiter error detected.
8
1000BASE-T ESD
error
RO This is a self-clearing bit.
0
1 = End-of-stream delimiter error detected.
7
1000BASE-T carrier
RO This is a self-clearing bit.
0
extension error
1 = Carrier extension error detected.
6
Non-compliant
RO 1 = Non-compliant BCM5400 detected.
0
BCM5400 detected
5
MDI crossover error
RO 1 = MDI crossover error detected.
0
4:0 Reserved
RO
4.2.15
Table 22.
Bypass Control
The bits in the Bypass Control register in the VSC8601 device control aspects of
functionality in effect when the device is disabled so that traffic can bypass it in your
design. The following table lists the settings available.
Bypass Control, Address 18 (0x12)
Bit
15
14:9
8
7
Name
Transmit disable
Reserved
1000BASE-T
transmitter test
clock
Force non-compliant
BCM5400 detection
6
Non-compliant
BCM5400 detection
disable
5
Disable pair swap
correction
4
Disable polarity
correction
3
Parallel detect
control
2
Reserved
1
Disable automatic
1000BASE-T next
page exchange
0
CLKOUT output
enable
Access
R/W
RO
R/W
Description
1 = PHY transmitter disabled.
1 = Enabled.
R/W
R/W
R/W
R/W
R/W
RO
R/W
R/W
This is a sticky bit.
1 = Force non-compliant BCM5400
detection.
This is a sticky bit.
1 = Non-compliant BCM5400 detection
disable.
This is a sticky bit.
1 = Disable the automatic pair swap
correction.
This is a sticky bit.
1 = Disable polarity inversion correction on
each subchannel.
This is a sticky bit.
1 = Do not ignore advertised ability.
0 = Ignore advertised ability.
This is a sticky bit.
1 = Disable automatic 1000BASE-T next
page exchanges.
This is a sticky bit.
1 = Enable clock output pin.
Default
0
0
0
1
0
0
1
0
CMODE
Revision 4.1
September 2009
Page 47