VSC7124 Datasheet, PDF (3/8 Pages) Vitesse Semiconductor Corporation – Quad Port Bypass Circuit

VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC7124
Figure 2: Timing Waveforms
Quad Port Bypass Circuit
Ix+/-
Ox+/-
T₁
T₁
AC Characteristics (Over Recommended Operating Conditions)
Parameters
Description
T₁
T_R, T_F
T_j(PBC)
Propagation Delay
Serial Data Rise and Fall Time
Data Jitter Accummulation
Min Typ Max Units
Conditions
7.0
ns
Delay with all circuits
bypassed.
300
ps At ∆V_IN minimum levels
120
ps Peak-to-Peak on Ox+/-
DC Characteristics (Over Recommended Operating Conditions)
Parameters
Description
Min Typ Max Units
Conditions
V_OH
V_OL
V_IH
V_IL
I_IH
I_IL
∆V_OUT75(1)
∆V_OUT50(1)
∆V_IN(1)
V_DD
P_D
I_DD
Output HIGH voltage (TTL)
Output LOW voltage (TTL)
Input HIGH voltage (TTL)
Input LOW voltage (TTL)
Input HIGH current (TTL)
Input LOW current (TTL)
TX output differential peak-to-peak
voltage swing
TX output differential peak-to-peak
voltage swing
Receiver differential peak-to-peak
Input Sensitivity RX
Supply voltage
Power dissipation
Power Supply Current
2.4
V
I_OH = -1.0 mA
0.5
V
I_OL = +1.0 mA
2.0
5.5
V
0
0.8
V
50
500
µA V_IN =2.4V
-500
µA V_IN =0.5V
1200
2200 mVp-p 75Ω to V_DD – 2.0 V
1000
2200 mVp-p 50Ω to V_DD – 2.0 V
400
2600 mVp-p Internally biased to V_DD/2
3.14
3.47
V 3.3V±5%
250
555
mW
Outputs open,
V_DD = V_DD max ±2%
76
160
mA
Outputs open,
V_DD = V_DD max
NOTE: (1) Refer to Application Note AN-37 for details regarding differential voltage measurements.
G52293-0, Rev 2.3
05/07/01
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Internet: www.vitesse.com
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