SIP41111 Datasheet, PDF (9/10 Pages) Vishay Siliconix – 75 V/2 A Peak, Low Cost, High Frequency Half Bridge Driver

Thermal Consideration
The thermal issue of the IC cannot be ignored because the
driver IC is the power conversion device. The IC can gener-
ate unexpected amount of heat to have high temperature if
the thermal issue is not carefully considered at begin of the
system level design. The additional heat sink for the IC will
increase the cost of materials. The best solution to settle the
thermal issue to improve the reliability of the system design
is to increase the trace copper area as much as possible for
heat dissipation. The PCB traces are not only for electrical
connection. It is also used for heat dissipation.
The PowerPAK SOIC package is designed to meet the
higher ambient environment operation. A heat dissipation
pad is built under the body of the SOIC package. Availability
of heat dissipation pad under the body of the package
doesn't means the thermal issue can be ignored because the
PowerPAK is designed to mount the body of the package on
the PCB trace for heat dissipation. The PowerPAK cannot
dissipate enough heat to provide a cool environment for the
IC because the surface area of PowerPAK is small. Large
trace area is the best way to control the temperature of the
IC in the high ambient environment.
SiP41111
Vishay Siliconix
Layout Consideration
Careful PCB layout design is absolutely necessary for any
high frequency switching device to avoid circuit function and
EMI issues. The following guideline should be carefully fol-
lowed to optimize the performance of SiP41111 driver.
1. It is strongly recommended to place a 0.1 uf lower ESR
decoupling ceramic capacitor right next to the IC from
V_DD to V_SS.
2. The loops formed between device and the gate of the
MOSFET should be as small as possible. It is strongly
recommended to place the IC right next to the gate of the
MOSFET to form small driving loop between pin HO, HS,
LO and Vss because high frequency, huge instanta-
neous current is being sunk and sourced in these loop to
drive the gate of the MOSFET, which look like a large
capacitive load to the device. If the physical distance can
not be minimized due to PCB layout mechanical specifi-
cation, the width of the loop traces should be increased
as much as possible to reduce the impedance of the loop
traces.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?74292.
Document Number: 74292
S-61214–Rev. A, 17-Jul-06
www.vishay.com
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