SI9165_07 Datasheet, PDF (8/10 Pages) Vishay Siliconix – High Frequency 600-mA Synchronous Buck/Boost Converter

Si9165
Vishay Siliconix
DETAIL OPERATIONAL DESCRIPTION (CONT’D)
Error Amplifier
Output MOSFET Stage
The error amplifier gain-bandwidth product and slew rate is
critical parameters which determines the transient response
of converter. The transient response is function of both small
and large signal response. The small signal is the converter
closed loop bandwidth and phase margin while the large
signal is determined by the error amplifier dv/dt and the
inductor di/dt slew rate. Besides the inductance value, error
amplifier determines the converter response time. In order to
minimize the response time, the Si9165 is designed with 2
MHz error amplifier gain-bandwidth product to generate the
widest converter bandwidth and 3.5 V/µs slew rate for ultra-
fast large signal response.
The high- and low-side switches are integrated to provide
optimum performance and to minimize the overall converter
size. Both, high and low-side switches are designed to
handle up to 600 mA of continuous current. The MOSFET
switches were designed to minimize the gate charge loss as
well as the conduction loss. For the high frequency
operation, switching losses can exceed conduction loss, if
the switches are designed incorrectly. Under full load,
efficiency of 90 % is accomplished with 3.6 V battery voltage
in both buck and boost modes (+ 2.7 V output voltage for
buck mode and + 5 V output voltage for boost mode).
Oscillator
The oscillator is designed to operate up to 2 MHz minimal.
The 2 MHz operating frequency allows the converter to
minimize the inductor and capacitor size, improving the
power density of the converter. Even with 2 MHz switching
frequency, quiescent current is only 500 µA with unique
power saving circuit design. The switching frequency is
easily programmed by attaching a resistor to R_OSC pin. See
oscillator frequency versus R_OSC curve to select the proper
values for desired operating frequency. The tolerance on the
operating frequency is ± 20 % with 1 % tolerance resistors.
Synchronization
The synchronization to external clock is easily accomplished
by connecting the external clock into the SYNC pin. A logic
high to low transition synchronizes the clock. The external
clock frequency must be within 1.2 to 1.5 times the internal
clock frequency.
Break-Before-Make Timing
A proper BBM time is essential in order to prevent shoot-
through current and maintain high efficiency. The break-
before-make time is set internally at 20 ns at V_S = 3.6 V. The
high and low-side MOSFET drain voltages are monitored
and when the drain voltage reaches the 1.75 V below or
above its initial starting voltage, 20 ns BBM time is set before
the other switch turns on. The maximum controllable duty
cycle is limited by the BBM time. Since the BBM time is fixed,
maximum controllable duty cycle will vary depending on the
switching frequency.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?70845.
www.vishay.com
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Document Number: 70845
S-72058-Rev. D, 08-Oct-07