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DG408_11 Datasheet, PDF (8/18 Pages) Vishay Siliconix – 8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers
DG408, DG409
Vishay Siliconix
SCHEMATIC DIAGRAM (Typical Channel)
V+
GND
VREF
A0
AX
V+
EN
V-
TEST CIRCUITS
Level
Shift
Decode/
Drive
Fig. 1
+ 15 V
V+
A2
S1
A1
S2 - S7
A0
DG408 S8
± 10 V
± 10 V
EN
D
GND V-
50 Ω
300 Ω
- 15 V
VO
35 pF
+ 15 V
V+
A1
S1
A0
S1a - S4a, Da
± 10 V
DG409 S4b
EN
GND
Db
V-
± 10 V
50 Ω
300 Ω
- 15 V
VO
35 pF
Logic 3 V
Input
0V
VS1
Switch
Output
VO
0V
VS8
tTRANS
S1 ON
Fig. 2 - Transition Time
D
V+
V-
S1
Sn
50 %
tr < 20 ns
tf < 20 ns
90 %
S8 ON
90 %
tTRANS
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8
Document Number: 70062
S11-0933-Rev. J, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000