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SI9140 Datasheet, PDF (7/15 Pages) Vishay Siliconix – SMP Controller For High Performance Process Power Supplies
PIN CONFIGURATIONS
Si9140
Vishay Siliconix
ORDERING INFORMATION
Temperature Range
Part Number
0° to 70°C
-40° to 85°C
Si9140CY
Si9140DY
ORDERING INFORMATION
Temperature Range
Part Number
0° to 70°C
-40° to 85°C
Si9140CQ
Si9140DQ
PIN DESCRIPTION
Pin 1: VDD
The positive power supply for all functional blocks except
output driver. A bypass capacitor of 0.1 µF (minimum) is
recommended.
Pin 2: MON
Non-inverting input of a comparator. Inverting input is tied
internally to reference voltage. This comparator is typically
used to monitor the output voltage and to flag the processor
when the output voltage falls out of regulation.
Pin 5: FB
The inverting input of the error amplifier. An external resistor
divider is connected to this pin to set the regulated output
voltage. The compensation network is also connected to this
pin.
Pin 6: NI
The non-inverting input of the error amplifier. In normal
operation it is externally connected to VREF or an external
reference.
Pin 3: VGOOD
This is an open drain output. It will be held at ground when
the voltage at MON (Pin 2) is less than the internal reference.
An external pull-up resistor will pull this pin high if the MON
pin (Pin 2) is higher than the VREF. (Refer to Pin 2
description.)
Pin 4: COMP
This pin is the output of the error amplifier. A compensation
network is connected from this pin to the FB pin to stabilize
the system. This pin drives one input of the internal pulse
width modulation comparator.
Pin 7: VREF
This pin supplies a 1.5-V reference.
Pin 8: GND (Ground)
Pin 9: ENABLE
A logic high on this pin allows normal operation. A logic low
places the chip in the standby mode. In standby mode normal
operation is disabled, supply current is reduced, the oscillator
stops and DS goes high while DR goes low.
FaxBack 408-970-5600, request 70026
www.siliconix.com
S-58034—Rev. G, 15-Mar-99
7